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fleverDDS_new
fpga控制da产生幅值频率可调的正弦波程序(the fpga Control da produce the amplitude adjustable frequency sine wave program)
- 2013-01-07 10:47:43下载
- 积分:1
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PipelineSim
一个计算机原理课程设计的作业,5级流水线CPU,指令集到代码均为自己设计,有最终报告文档,组建说明,并行除法,16位字长,定长指令,Verilog源代码,顶层设计图。结构简单,冲突解决方式也很简单,代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)
- 2012-06-24 22:19:14下载
- 积分:1
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wp_max_flash
FPGA中FLASH配置控制源码,VHDL和Verilog(FPGA source code in the FLASH configuration control, VHDL and Verilog)
- 2007-12-11 15:57:15下载
- 积分:1
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hdl_adder
MATLAB to HDL Code conversion
- 2020-06-17 12:40:01下载
- 积分:1
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UART_RS232_Altera
在Altera开发板上实现RS232串口通信,平台为CycloneII,可通过QuartusII软件修改引脚移植到其它平台(Realize RS232 serial communication on Altera development board, platform for CycloneII, through software QuartusII modify pin portable to other platforms)
- 2016-03-25 20:29:04下载
- 积分:1
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hammingaTB
Design HDL code for a circuit that calculates the Hamming distance of two 8-bit inputs.
- 2013-11-06 15:45:02下载
- 积分:1
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Altium Partner SN-1000010 r10
说明: Browser modularization processing, browser modularization combing, browser modularization expansion
- 2020-06-24 04:20:01下载
- 积分:1
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uart
uart发射机Verilog HDL代码(Verilog HDL code uart transmitter)
- 2011-05-21 21:37:01下载
- 积分:1
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line_four
利用verilog HDL逐点比较法实现直线和圆弧插补(Use verilog HDL by-point comparison method to achieve linear and circular interpolation)
- 2020-12-01 14:59:27下载
- 积分:1
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CV_FPGA_to_HPS_Bridge_Design_Example
FPGA通过AXI总线传输数据给ARM,ARM使用DMA方式接收数据!(FPGA to ARM Bridge design example)
- 2020-12-01 20:49:25下载
- 积分:1