用FPGA verilog hdl模拟类I2C通信

说明：  FPGA串口实现。 发送和接受数据功能代码(FPGA serial interface. Send and receive data function code)

用于检测信号上升沿，输出与时钟相关的正脉冲(Detect the rising edge of the signal)

APB总线协议转I2C总线协议的接口IP，verilog代码实现，包含详细testbench(APB bus interface to I2C bus interface IP，verilog code )

利用verilog编写的电梯程序，实现基本的电梯运行功能(Elevator program written by Verilog)

贪吃蛇程序，用verilog实现，可以运行只要修改一下相应的FPGA芯片类型和VGA接口相应的引脚(Snake program, using Verilog to achieve, you can run as long as the appropriate to modify the corresponding FPGA chip type and VGA interface to the corresponding pin)

AD9235FPGA编程 可AD采集信号 信号频谱检测 检测任意波形输入(AD9235FPGA programming allows AD to collect signal and spectrum detection and detect arbitrary waveform input.)

超前进位加法器得VHDL实现小点资料代码(CLA was a small point of information VHDL code)

使用cordic算法，基于verilog实现的atan功能，经过仿真验证，适宜工程使用。(ATAN,implemented with cordic.)

说明：  ad9649的fpga驱动程序,FMC接口，基于Xilinx KC705(AD9649 Evaluation Board, FMC Interposer & Xilinx KC705 Reference Design)

介绍了在数字语音通信中, 利用在系统可编程技术和复杂可编程逻辑器件CPLD, 实现了数字语音的复接和分接 对于其中的单稳态电路的数字化和数字锁相环提取位同步信号也进行了详细的设计说明。实际应用结果表明, 系统工作稳 定可靠, 设计是成功的。(Describes the digital voice communications, the use of in-system programmable technical and complex programmable logic device CPLD, to achieve the digital voice multiplexer and demultiplexer for the single steady state in which the digital circuit and digital phase locked loop extraction bit synchronization signals are also carried out a detailed design specification. The practical application results show that the system works stable and reliable design is successful.)