SP3E平台ARM7

verilog 实现的FFT 流水线操作，速度能达到200M(verilog pipelining the FFT implementation, the speed can reach 200M)

这个是用VHDL实现FPGA对FLASH的读写。(This is achieved using VHDL FLASH FPGA to read and write.)

verilog编写的1024点的fft快速傅立叶变换代码                                                                                                                                                     

amba apb协议v2.0 verilog和数据表

拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现(Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone)

XAPP224 VHDL Data Recovery design file

说明：  LTE is an abbreviation for Long Term Evolution.

用VERILOG实现 交通灯控制，且运行正确，希望有帮助(Use VERILOG implementation traffic light control, and operation right, hope to have help)

说明：  设计一个串行数据检测器，当连续输入三个或更多1时输出1，否则输出0(Design a detector for serial data It outputs 1 when three or more 1 input continuously and outputs 0 otherwise)

FPGA控制DA（AD9740）的程序代码，包含mif文件，基于verilog编写，已调试通过。