基于FPGA的门级逻辑实现快速乘法运算的verilog源程序。

验证阻塞赋值与非阻塞的赋值赋值过程的先后顺序(Verification of the order of assignment and non blocking assignment)

FPGA的学习指南，绝对经典，内容比较超值，我已经细心读过了，讲解清晰，快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.

matlab 编的瑞利信道仿真源码，对研究信道很有用(hgajdjkjhakhdkhakjlkjlka)

说明：  基于Xilinx Spartan6系列的fpga的VGA实现(Based on Xilinx Spartan6 series fpga VGA implementation)

FPGA的存储器代码的VHDL,verilog描述及测试代码-FPGA memory code VHDL, verilog description and test code

学习FPGA的资料，基于FPGA的卡尔曼滤波器的设计与实现(Learning FPGA information, FPGA-based Design and Implementation of Kalman Filter)

说明：  USB传图至fpga板缓存至DDR内，FPGA再读出图像数据，显示在TFT彩屏上；(USB to the FPGA board cache DDR, FPGA read out the image data, display on the TFT color screen;)

说明：  【实例简介】用Verilog实现uart串口协议，波特率可选9600、19200、38400、115200。8位数据为，1位校验位，1位停止位。 【实例截图】 【核心代码】核心代码包括TX，RX，Baud，FIFO([example introduction] UART serial port protocol is implemented with Verilog, and the baud rate can be 9600, 19200, 38400, 115200. 8-bit data, 1 bit check bit, 1 stop bit. [example screenshot] [core code] the core code includes TX, Rx, baud and FIFO)

说明：  用于FPGA的学习，大家值得借鉴，可以好好学习一下(this is for fpga and you can use this.)

VHDL上百实例 包括 ADDER LATCH FIPPER AND ETC..(VHDL hundreds of examples, including ADDER LATCH FIPPER AND ETC ..)