杉木过滤器

为华为内部文件，用于华为内部员工培训，对我们从事科研的人来说，这是个一个非常好的材料，可以学习华为文档管理规范，和代码编写规范。当然了也学习华为如何化繁为简，让员工迅速掌握关键技术。这个一个非常值得学习揣摩的材料

here is realized simple FIFO stack in vhdl. very simple example, but very helpful.

huffman transform in vhdl language

NN CONTROLLER FOR UPQC

Digital pre-distortion (DPD) is an advanced digital signal-processing technique that mitigates the effects of power amplifier (PA) nonlinearity in wireless transmitters. DPD plays a key role in providing efficient radio digital front-end (DFE) solutions for 3G/4G basestations and beyond. Modern FPGAs are a promising target platform for the implementation of flexible wireless DFE solutions, including DPD.

基于fpga和xinlinx ise 的7段码led显示程序，希望对你有所帮助-and ideally xinlinx 7 of the code led display program, and I hope to help you

vhdl波形发生程序.实现4种常见波形正弦、三角、锯齿、方波（A、B）的频率、幅度可控输出（方波 A的占空比也是可控的），可以存储任意波形特征数据并能重现该波形，还可完成 各种波形的线形叠加输出。 -vhdl waveform occurred procedures. 4 achieve common sinusoidal waveform, 1.30, sawtooth, square-wave (A, B) the frequency and amplitude control output (square A duty cycle is also controllable), can store data of arbitrary waveform characteristics and able to reproduce the waveform, but also through a variety of linear superposition of the waveform output.

该代码实现出租车计费功能，例如起步价为5元，按住相关控件后，每隔五秒，计数将加1，实现类似于开车时计费的功能，当松开按键后，计费也将停止。。。。

说明：  Verilog学习文档，介绍基本知识点，语言要素(for learning Verilog)

1路视频光端机的发射端，VHDL源码，使用全FPGA芯片的硬件，内建成帧、时钟、SERDES-The launch of a video PDH client, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES