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coreahblite代码
amba ahblite总线时序转并口时序,可访问sram/flash/mram,适用于smartfusion2系统,arm内核对外进行数据访问。
- 2023-08-27 04:00:03下载
- 积分:1
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Hynix公司8M Byte SDR SDRAM的Verilog语言仿真实现
Hynix公司8M Byte SDR SDRAM的Verilog语言仿真实现-Hynix" s 8M Byte SDR SDRAM Simulation of the Verilog language
- 2022-01-27 22:19:48下载
- 积分:1
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adc0809用FPGA控制的采样非常好用的实例 自己看书后终结的
adc0809用FPGA控制的采样非常好用的实例 自己看书后终结的-ADC0809
- 2022-09-16 00:25:02下载
- 积分:1
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EDA-traffic-lights-control-system
EDA的交通信号灯的控制系统的程序,设计一个交通信号灯控制器,由一条主干道和一条支干道汇合成十字路口,在每个入口处设置红、绿、黄三色信号灯,红灯亮禁止通行,绿灯亮允许通行,黄灯亮则给行驶中的车辆有时间停在禁行线外。(EDA traffic lights control system procedures)
- 2013-04-18 20:09:42下载
- 积分:1
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UART
verilog代码,串口发送接收代码,含有源代码和测试文件,准确可用(verilog code for serial port transmit and receive code, with source code and test files, and accurate available)
- 2011-10-19 09:20:12下载
- 积分:1
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jishuqi
计数器是数字系统中使用最多的时序电路,它不仅能用于对时钟脉冲计数,还可以用于分频、定时、产生节拍脉冲和脉冲序列以及进行数字运算等。(Counter is the most frequently used sequential circuit in digital system. It can be used not only for counting clock pulses, but also for frequency division, timing, generating beat pulses and pulse sequences, and performing digital operations.)
- 2018-11-26 15:42:03下载
- 积分:1
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5_ADC_Lab
基于altera公司MAX10型FPGA的ADC调试程序(ADC-based debugger altera company MAX 10 type of FPGA)
- 2015-11-18 10:56:16下载
- 积分:1
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基于fpga的正弦波发生器设计,有一定的参考价值,写的比较详细...
基于fpga的正弦波发生器设计,有一定的参考价值,写的比较详细-The sine wave generator based on FPGA design, have a certain reference value, a more detailed written
- 2022-12-22 09:40:03下载
- 积分:1
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mmuart
简单uart,verilog语言编写,已经经过测试,有需要的可以看看(Simple uart, Verilog language, has been tested, you can see if you need it)
- 2020-06-23 20:00:01下载
- 积分:1
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程序
传感器是一种检测装置,能感受到被测量的信息,并能将感受到的信息,按一定规律变换成为电信号或其他所需形式的信息输出,以满足信息的传输、处理、存储、显示、记录和控制等要求(Sensor is a kind of detection device, which can sense the measured information and transform it into electrical signal or other required information output according to certain rules to meet the requirements of information transmission, processing, storage, display, recording and control.)
- 2020-06-18 22:00:01下载
- 积分:1