文章论述如何将向modelsim中添加仿真库，包括添加xilinx,altera,actel公司的仿真库的方法...

这是我的VHDL格式的电子密码锁源程序，请站长审核啊-This is my VHDL source code format of the electronic lock, please review ah owners

说明：  文档中的verilog代码实现了FPGA与SSI总线的数据协议链接(Verilog code in the document of the FPGA data bus protocol and SSI links)

说明：  sd_sdram_lcd 是读取SD卡中的数据，然后通过LCD显示(It is to read the data in SD card and display it by LCD)

用窗函数法设计一个线性相位FIR数字低通滤波器，用理想低通滤波器作为逼近滤波器，通带截止频率为0.2 ，阻带截止频率为0.4 ，阻带衰减不小于-40dB。(Window function method to design a linear phase FIR digital low-pass filter, as an ideal low-pass filter for approximation filter passband cutoff frequency of 0.2 stopband cutoff frequency of 0.4, the stop-band attenuation of less than-40dB.)

一个交通灯设计,简单的实现，没有添加其他的显示管(Traffic Light System)

ODBC编程实例，使用ODBC对基于开关量数据采集卡的通信接口设计与实现。(ODBC programming examples, using ODBC for data acquisition card based digital communications interface design and implementation.)

本程式為使用Verilog語言寫控制DRAM的控制模塊, 可以簡易的控制DRAM IC, 本程式已經過系統驗證.(program for the use of the Verilog language to write the control of DRAM control module, be easy to control DRAM IC, the program has been systematically verified.)

给出了SVPWM算法的详细FPGA实现方法！(A detailed FPGA SVPWM algorithm to achieve the method!)

vhdl code for multiplexer and detemines how multiplexer works

代码风格非常好，容易看懂，移植性高