文章论述如何将向modelsim中添加仿真库，包括添加xilinx,altera,actel公司的仿真库的方法...

RS232的UART编程，包括波特率发生器模块，串口接受模块，串口发送模块(RS232 programming the UART, including the baud rate generator module, serial module to receive, send serial module)

JOP字节码获取的源码，很重要，具体FPGA中实现-JOP byte code access to the source code is important to achieve specific FPGA

用FPGA实现DDS,可变频,幅值由硬件完成-Using FPGA realize DDS, can be frequency, amplitude from hardware to complete

利用FPGA内核产生SPWM波，并且频率可调(The FPGA kernel is used to generate SPWM waves, and the frequency is adjustable)

8位深，9位宽FIFO VHDL源码设计，如需改进可在此基础上扩展-8 deep, 9-bit wide FIFO VHDL source design, for improving on this basis can be extended

用VHDL语言设计简单的CPU，重点设计微操作代码，然后设计CPU各组成模块，最后根据设计的微操作设计微指令，验证设计的正确性。可基本实现加、减、乘、除、移位、循环等操作。-VHDL language is designed to be simple to use the CPU, the focus of the design of micro-operation code, and then design the components of CPU module designed the final design of the micro-operation microinstruction to verify the correctness of the design. Can achieve the basic add, subtract, multiply, divide, transfer, recycling and other operations.

说明：  A low pass filter module based on FPGA, easy to transplant

主要讲述了数码相机MIPI接口协议说明，工作模式及信号传输原理等(Camera Interface Overview)

说明：  I2C 从设备通讯应用示范程序，用于I2C设计验证(I2C slave communication application demo program, used to for I2C design verification )

本例程使用vivado2014.4工具，利用xilinx Basys3 实验板实现板载流水灯的两种模式控制。(This project uses verilog HDL to realize the the control of 16 leds loaded on Xilinx Basys3 board.)