Coding Styles for if Statements and case Statements

说明：  通过按键输入学号，并循环显示： 电路功能描述：通过Ego1上的按键输入自己的学号（8位10进制数），并存储在32位的寄存器中；8位10进制数输入完成后，实现滚动显示效果。(Enter the student number by pressing the key, and display it in a cycle: Circuit function description: input one's own student number (8-digit decimal number) through the key on ego1, and store it in 32-bit register; after the completion of 8-digit decimal number input, the scrolling display effect is realized.)

一个基于FPGA的数字跑表系统的设计，最小单位是百分表位。采用十进制进位。-FPGA-based digital stopwatch system design, the smallest unit is a digital dial indicator. Binary using the metric system.

机器人控制,用matlab robotics toolbox 仿真设计(robotics controll using matlab robotics toolbo simulation)

16卫浮点FFT算法的VHDL实现，有测试文件。-16 floating-point FFT algorithm Wei VHDL realize, have the test paper.

比较详细的阐述了图像压缩的原理,并基于DSP和VHDL实现该系统,最后在FPGA上通过.(More detailed exposition of the principles of image compress, and VHDL-based implementation of the system, and finally in the FPGA.)

分数阶Unscented卡尔曼滤波器研究.pdf(Fractional Unscented Kalman filter pdf)

It is then register ( shifter) PISO ( Parallel - in, serial - out)-It is then register ( shifter) PISO ( Parallel- in, serial- out)

基于FPGA的乐曲发生器电路设计 附含源代码（quartersii环境下运行）-FPGA-based circuit design of the music generator containing the source code is attached (quartersii environment to run)

华为内部的FPGA设计培训教程，详细阐述了设计流程图、Verilog HDL设计、逻辑仿真、逻辑综合。对大家的学习一定有帮助的。-Huawei within the FPGA design training tutorial, a detailed flow chart of the design, Verilog HDL design, logic simulation, logic synthesis. Study of the U.S. must have help.

LDPC COded OFDM System