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iq_balance
调整iq幅度不平衡的模块,可以解决载漏和边带问题。(Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.)
- 2021-04-23 17:48:47下载
- 积分:1
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qiangdaqi
本程序为四路抢答器verlog HDL语言工程实例。(This program is four Responder verlog HDL language engineering examples.)
- 2013-10-30 14:48:21下载
- 积分:1
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exercise3
用verilog实现dsp与Fpga接口的同步设计,其功能包括读写操作及四个功能模块,采用两个fifo实现不同时钟域的地址与数据的转换,在quartus ii11.0环境下运行,运行此程序之前需运行将调用fifo。(Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modules, using two different clock domains to achieve fifo address and data conversion in quartus ii11.0 environment to run, run this program required before running calls fifo.)
- 2013-08-30 11:12:09下载
- 积分:1
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基于altera系列芯片lvds接口的fpga设计 verilog源码
基于altera系列芯片lvds接口的fpga设计 verilog源码-Series altera-based chip interface lvds source fpga design verilog
- 2023-08-31 17:40:04下载
- 积分:1
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flash
本程序是fpga控制flash的读写程序,包括了程序和仿真时的测试文件(fpga flash)
- 2013-07-21 14:47:36下载
- 积分:1
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Advanced FPGA
Design
Architecture, Implementation,
and Optimization
Advanced FPGA
Design
Architecture, Implementation,
and Optimization
- 2022-02-05 23:31:15下载
- 积分:1
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基于FPGA五子棋显示verilog源代码
基于FPGA的verilog语言描述五子棋游戏中的棋框显示,应用VGA显示原理,用不同的颜色显示边框。以及根据棋子输入的要求,显示相应的棋子,不同的颜色显示不同的棋框和棋子
- 2022-12-19 10:35:03下载
- 积分:1
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prepared using VHDL stepper motor control methods. For your reference.
用VHDL编写的步进电机控制方法.供大家参考用.-prepared using VHDL stepper motor control methods. For your reference.
- 2022-06-16 01:54:04下载
- 积分:1
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lgpl RS编解码
5
lgpl RS编解码
5-6 Reed-Solomon Codes-LGPL RS codec 5-6 Reed-Solomon Codes
- 2022-02-01 10:13:23下载
- 积分:1
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DFT_S_OFDM_lyl
LTE上行链路使用的DFT-S-OFDM系统的仿真,其中包括QPSK星座映射、串并转换、N点DFT、子载波映射等。(LTE uplink using the DFT-S-OFDM system simulation, including QPSK constellation mapping, string and conversion, N-point DFT, subcarrier mapping, etc..)
- 2020-11-01 20:59:55下载
- 积分:1