8051的vhdl源代码，主要针对初学者

数字逻辑与系统的关于所有的器件74LS的介绍，功能表(Digital Logic and System devices 74LS on the introduction of all the menu)

ad9230的配置程序，差分输入输出，verilog(ad9230 configuration program, verilog)

串口！ 这是一个使用的通信程序 ， 非常好用。(serial port Serial port! This is a communication program used, very useful.)

基于FPGA的ip核FIR低通滤波器，实现滤波功能，简单好用(FPGA-based ip core FIR filter for filtering function, easy to use)

ALTERA嵌入式设计大赛获奖作品文章，非常适合DE2开发参考-ALTERA Embedded Design Competition Prize-winning article, very suitable for the development of reference DE2

交通灯控制系统VHDL源码，用VHDL语言、MAXPLUS2环境设计实现(VHDL core)

本程序为Verlog语言程序，采用QUARTUS6.0编写，程序实现的功能是控制AD2S80的转换和和数据总线上数据的读取-This program is Verlog language program, using QUARTUS6.0 preparation, program implementation function is to control the conversion and AD2S80 and data bus to read data

基于VHDL的数字计时器，手动可控正计时和倒计时(含复位键和使能键)(VHDL-based digital timer and countdown timer being controlled manually (with the reset button and enable key))

说明：  基于PCF8591数模转换和DDS技术的信号发生器系统设计(Design of Signal Generator System Based on PCF8591 Digital-to-Analog Conversion and DDS Technology)

说明：  关于计时器 verilog语言，采用arm架构的m3，可以直接应用于soc(About timer verilog language, USES the arm architecture of m3, can be directly applied to soc)