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Lantern controller vhdl language test eda
彩灯控制器 vhdl语言开发 eda实验-Lantern controller vhdl language test eda
- 2023-01-14 11:25:03下载
- 积分:1
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Practical program code, in the hope that useful to everybody, has debugging thro...
实用的程序代码,希望对大家有用,已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through
- 2023-05-31 22:10:04下载
- 积分:1
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Noc
说明: credit base network on chip(network on chip (noc))
- 2020-06-19 11:40:02下载
- 积分:1
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The experimental results are used to prepare MOSIN6 is achieved Verilog HDL lang...
有实验结果,用MOSIN6编写的,是Verilog HDL语言实现的.
练习三 利用条件语句实现计数分频时序电路
实验目的:
1. 掌握条件语句在简单时序模块设计中的使用;
2. 学习在Verilog模块中应用计数器;
3. 学习测试模块的编写、综合和不同层次的仿真。
练习四 阻塞赋值与非阻塞赋值的区别
实验目的:
1. 通过实验,掌握阻塞赋值与非阻塞赋值的概念和区别;
2. 了解阻塞赋值与非阻塞赋值的不同使用场合;
3. 学习测试模块的编写、综合和不同层次的仿真。
-The experimental results are used to prepare MOSIN6 is achieved Verilog HDL language. Practice the use of conditional statements to achieve the three sub-frequency timing circuit count experimental purposes: 1. Have conditional statements in the simple timing of the use of modular design 2. Learning modules in the Verilog Application of counter 3. to learn the preparation of the test module, integrated and different levels of simulation. Practicing the four blocking assignment with the distinction between non-blocking assignment experimental purposes: 1. Through experiments, hands blocking assignment with the concept of non-blocking assignment and distinction 2. Understanding of blocking and nonblocking assignment assignment usi
- 2022-03-18 15:26:04下载
- 积分:1
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电子时钟
基于DE2-115的数字时钟
1.液晶显示,数码管显示
2.整点报时
3.闹钟
4.设置时间
5.设置闹钟(Digital clock based on DE2-115
1. LCD display, digital tube display
2. whole point
3. alarm clock
4. setting time
5. set the alarm clock)
- 2021-03-06 23:39:29下载
- 积分:1
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人脸识别(3D)
说明: 基于高清视频的3D人脸识别源代码,四万多行,经过FPGA实际验证,最近调试完毕。(The source code of 3D face recognition based on HD video, more than 40,000 lines, has been verified by the actual FPGA, and has been debugged recently.)
- 2019-07-01 16:22:46下载
- 积分:1
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Spartan 3e
Spartan 3e - Active Power Meter-Spartan 3e- Active Power Meter
- 2022-02-28 11:45:02下载
- 积分:1
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pprobar
ES A PRACRICA 2 DEL LABORATORIO DE DIGITAL
- 2013-12-09 04:26:42下载
- 积分:1
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N-bits-by-M-bits
这是一个verilog代码实现的常用乘法器。设计的是通用N比特乘M比特的二进制乘法器(This is a common multiplier verilog code. Design of a generic N bits by M bits of the binary multiplier)
- 2013-10-05 19:44:52下载
- 积分:1
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my_lms
自适应滤波,对输入信号进行选择性的加权处理,使输出达到最优化,并且能够跟踪和适应系统和环境的动态变化(Least mean square,of the input signal processing, selective weighted output, and optimize can track and adapt to the dynamic changes of the system and environment)
- 2010-10-14 15:30:00下载
- 积分:1