cycloneII ep2c5 ep2c8

基于vhdl的pid控制器设计，可以用quartus等软件实现。数字控制系统pid设计源代码。(Pid controller based on VHDL design, can use the quartus software implementation, etc. Digital pid control system design of source co)

LCD SpartaN3E fpga vi

cpld/fpga积分梳状滤波器(CIC)设计-cpld/fpga Integral comb filter (CIC) design

说明：  misp，五级流水源码，实现一个建议的cpu(Misp, five-stage flow source code, implementation of a recommended CPU)

moltiplicatore floating point

FSK信号发生器，基于VHDL语言，好用的！-FSK signal generator, based on the VHDL language, useful!

简易数字存储示波器verilog源代码 经过EP2C8Q208C8验证(Simple digital storage oscilloscope verilog source code has been verified EP2C8Q208C8)

说明：  verilog编写的RS485读写驱动程序(RS485 read-write driver written by Verilog)

很好的quartus软件仿真教程，flash版。-Good quartus software simulation tutorials, flash version.

该项目是用VHDL编写的，并在Nexys2板套件的4个七段显示器中显示一个测微计的秒、分和小时。时间可以在开关0中停止，在按钮0中复位。显示方式与显示方式不同最小：分段到hr:min通过切换开关1