de2的简单例程led

基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像基本操作,几何变换,直方图,灰度化处理等(System Generator based image processing engineering, multimedia processing FPGA implementation source code, the basic operation of the image, geometric transformations, histogram, gray processing)

This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)

FPGA扫描LED显示灯，动态扫描,进行流水显示(FPGA Scan LED indicator lights, dynamic scanning, make the water show)

汽车尾灯控制 能够实现 直行 左转 右转 左转刹车 右转刹车 直行刹车 故障等情况下的车灯控制 汽车尾灯控制 能够实现 直行 左转 右转 左转刹车 右转刹车 直行刹车 故障等情况下的车灯控制

Test for VHDL just a student version

电路四倍频算法，具有去毛刺，整形功能，方向及计数(Circuit quadruple frequency algorithm, with deburring, shaping function)

这是分数阶傅里叶变换FRFT的土耳其算法的FPGA实现的程序，FPGA是Xilinx的virtecx-5，这是我在做毕业设计的时候自己编写的，希望能对你有帮助！(This is the fractional Fourier transform algorithm FRFT Turkish FPGA implementation of the program, FPGA is the Xilinx virtecx-5, which is what I was doing graduate design time I have written, I hope you can help!)

AD7606采集代码，用于verilog 驱动 AD7606 adc SPI 串口方式(AD7606 acquisition code, used for Verilog drive AD7606 ADC SPI serial mode)

关于FPGA排序算法的研究文献，有全排序和一些归并算法的文献介绍。(FPGA sequencing algorithm on the literature, there are some sort of sorting algorithm and the literature on the merger.)

节约资源型 8位*8位 运算VHDL代码，采用串行运算，8 个时钟周期完成一次运算。QUARTUS下已验证(resource conservation-8* 8 Operational VHDL code, using serial computation. 8 clock cycles to complete an operation. QUARTUS has been under test)