数字相册集成电路实现

主控cc2530通过debug接口对目标cc2530进行程序烧写，使用DMA进行数据传输，已调试通过。(Master cc2530 through the debug interface for writing the program to target cc2530, using the DMA data transfer, has been work successful.)

使用Verilog编写的时间同步模块，解决位同步问题，ISE12.2下编译通过(Time synchronization module written in Verilog, bit synchronization issues under ISE12.2 compiled by)

This is a divider, which is depicted as well. It is a programming language Vhdl.

verilog实现VGA显示。有源代码，大家可以下载学习。

vhdl code fpga for lcd 2*16

IRIG_B解码器，直接解码IRIG_B DC(IRIG_B decoder)

不足20元的PCI设计，含ABEL源代码。(PCI design less than 20Yuan ,including ABEL code)

说明：  this code works with spi and uart interfaces.

说明：  该代码实现了俄罗斯方块旋转，左右移动，快速下降，计分和VGA显示等基本功能(This code realizes the basic functions of Russian square rotation, left-right movement, rapid decline, scoring and VGA display.)