基于fpga的实时视频采集与显示 高速化 小型化

32位元浮点数加法器,用于以VHDL编写的32位元CPU-32 bits floating-point Add

CycloneIV控制采样芯片AD9248-20MHz，VHDL语言(CycloneIV control sampling chip AD9248-20MHz, VHDL language)

Matlab agc ʵ

Mini AES Advanced Encryption Standard (AES) implementation with small area/resources utilization. Features - Encryption and Decryption unit in single core.

用全加器设计8位运算器逻辑电路图 2、根据逻辑电路用 VHDL编程实现 3、调试编译通过后，仿真 (this file can help you learn the design of cpu)

用FPGA分频，做一个有时分秒的时钟，并用数码管显示(FPGA divide a sometimes every minute clock, and digital display)

DS18B20温度传感器，用verilog语言实现(DS18B20 temperature sensor, with the verilog language)

说明：  AD9250是一款双通道14位ADC，最高采样速率250 MSPS，JESD204B Subclass 0或Subclass 1编码串行数字输出(The ad9250 is a dual channel 14 bit ADC with a maximum sampling rate of 250 MSPs and jesd204b sub class 0 or sub class 1 coded serial digital output)

基于vhdl编写的贪吃蛇游戏，课程设计必备(Based on the VHDL language of the snake game, curriculum design essential)

利用stm32F407实现的等精度测频，可以精确测量频率，误差很小(The equal precision frequency measurement realized by stm32F407 can accurately measure frequency with little error.)