VHDL呼吸灯程序，VHDL学习例程

基于VHDL的testbench编写攻略(VHDL based on the preparation of testbench Raiders)

是用于pci开发的核，可以将硬件的信息映射到然间上来 节省出开发人员用于了解硬件的时间 -Pci developed for nuclear, hardware information can be mapped to the inter-ran up to save the developers time to understand the hardware

verilog编写的RTC（实时时钟）包含APB总线接口、时钟计时部分等(verilog prepared by the RTC (real time clock) contains APB bus interface, clock time some other)

说明：  LVDS De-serialization

预失真算法中，包络解波部分的verilog代码，有部分错误(envelope calculation of DPD algorithm ，verilong HDL language)

一个用VHDL完成的8位数显的16进制的频率计-a VHDL completed 8 of 16 significant median band of frequency meter

说明：  在quartus上运行16QAM仿真，实现在modelsim上的波形仿真(Running 16QAM simulation on quartus)

FFT程序，此程序虽然耗逻辑资源很大，但是在接受数据后的第7个时钟沿就可以输出FFT变换后的数据，对要求时延较低的系统可以考虑-FFT procedure, this procedure should not consume a lot of logic resources, but the data in the first seven clock can be output along the FFT transformed data, the requirements of time-delay system can be considered lower

Altera QUARTUS 7.2的矩阵键盘电子琴完整工程（含源码），在EP2C20芯片上实现-Altera QUARTUS 7.2 Project of matrix keyboard electronic organ, implement on EP2C20 chip.

FPGA设计的四种常用思想与技巧，包括乒乓操作、串并转换、流水线操作、数据接口同步化(FPGA design of the four common ideas and techniques, including the operation of ping-pong, SERDES, pipelining, synchronization of data interface)