fpga led

verilog 编写的I2C程序，控制D/A的(I2C program written by Verilog to control D/A)

verilog 编写的ldpc编码，含有两个文件(LDPC written by Verilog)

verilog语言编写的jtag（边界扫描模块），初学的时候可以看看(verilog language jtag (boundary scan module), a novice when you can look)

模拟地铁自动售票机选票、付款、取票、找零等功能，包含软件仿真和硬件响应，可供仿真测试和FPGA验证。(Analog subway ticket vending machine ballots, payment, tickets, give change and other features, including software simulation and hardware response for simulation and FPGA verification test.)

Verilog RS232代码， 分为三个模块，时钟产生模块，发送数据模块，接收数据模块。 整个工程的功能是，你从串口上位机发送什么数据，串口就将该数据重新发送回上位机

这是一个二进制的最简单分频器，是一个简短的fpga代码，用verilog书写(This is the most simple of a binary frequency divider, the fpga is a short code, written in verilog)

BUS documentation and map reffereces

DE2使用手册，介绍DE2的所有组成元件，使用方法，还有相应的实例。(DE2 User Manual, describes all the components DE2 components, using the method, there is a corresponding instance.)

`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// //creat for the zedboard .  //The AD used ADV7511. ////////////////////////////////////////////////////////////////////////////////// module ad( datain , clk , rst , dataout );     input [11:0] datain;     input clk;     input rst;        output [11:0] dataout;

Verilog code to implment the 16 bits logic multiplier. The output is also 16bits including the document to describe the implement in detail .