Verilog Blocking and Non Blocking

说明：  五阶CIC梳状积分滤波器，可以综合，非常有参考价值(Fifth-order CIC points comb filter, can be integrated and very useful)

ds1302时钟驱动程序，已在quartus上验证可以是直接使用(DS1302 clock driver, which has been verified on quartus, can be used directly)

四通道DDS信号发生器，很好用的代码，大家一起分享(Four-channel DDS signal generator)

忆阻器的PSPICE仿真，是忆阻器的宏模型，适合于cadence16.5版本(memristor PSPICE simulation)

非常好的SDRAM Controller 设计文档。工程必备-SDRAM Controller Design of a very good document. Works required

16QAM,64QAM,256QAM调制下的球形译码(16QAM, 64QAM, 256QAM modulation sphere decoding)

说明：  这是8位CPU的CVDL代码。CPU 的主要功能是执行指令，控制完成计算机的各项操作，包括运算操作、传送操作、输入/输出操作等。作为模型计算机设计，将重点放在寄存器级，采取较简单的组成模式，以尽量简洁的设计帮助学生掌握CPU 的基本原理。 此次设计CPU就是为了了解CPU运行的原理，从而完成从指令系统到CPU的设计，并且通过仿真对CPU设计进行正确性评定。(The main function of CPU is to execute instructions, control and complete various operations of computer, including operation, transfer operation, input / output operation, etc. As a model computer design, it focuses on register level and adopts a simpler composition mode to help students master the basic principles of CPU with a concise design as far as possible. This design of CPU is to understand the principle of CPU operation, so as to complete the design from instruction system to CPU, and evaluate the correctness of CPU design through simulation.)

FPGA跑马灯程序,基于CPLD1270开发板的运用程序-Marquee program FPGA-based development board CPLD1270 the use of procedures

verilog 教程 PPT版本 语法 结构 设计技巧等(Verilog tutorial PPT version)

说明：  ADDER USING VERILOG ADDER WITH VERILOG VERILOG ADDER