-
Sequence Detection VHDL source code, ATERA platform compile. Report detailed des...
序列检测VHDL源代码,ATERA平台编译。详细的报表说明和模拟源代码。
- 2022-10-18 04:30:03下载
- 积分:1
-
测试人体视觉的反应时间,可以作为vhdl编程的练习之用,也可以更进一步的开发成为具有商业价值的产品,这里面只是能够实现测试人体视觉反应时间的基本功能的程序...
测试人体视觉的反应时间,可以作为vhdl编程的练习之用,也可以更进一步的开发成为具有商业价值的产品,这里面只是能够实现测试人体视觉反应时间的基本功能的程序-Test of human visual reaction time, can be used as VHDL programming exercises used can also be further developed into products with commercial value, there is only able to realize the human visual reaction time test the basic functions of the procedures
- 2022-10-07 16:40:02下载
- 积分:1
-
ahb_interface
AHB BUS, Master Slave Arbiter -- example(AHB BUS, Master Slave Arbiter)
- 2020-11-23 10:39:35下载
- 积分:1
-
FPGA realization of the LCD interface, VHDL programming, FPGA chips for Altera
FPGA实现的LCD接口,VHDL编程,FPGA芯片为ALtera公司的EP2c35-FPGA realization of the LCD interface, VHDL programming, FPGA chips for Altera
- 2022-09-14 14:30:09下载
- 积分:1
-
super fast debounce button on vhdl, xilinx xc
super fast debounce button on vhdl, xilinx xc
- 2022-10-30 03:20:04下载
- 积分:1
-
shuzishizhong
数字时钟,包括流程图以及编码和完整的实验报告,内容详细丰富。(Digital clock, including flowcharts, and coding and a full lab report, detailed and rich.)
- 2011-12-20 19:53:07下载
- 积分:1
-
cyclone and cyclone2 system used in the use 5v, making FPGA chip compatible with...
cyclone和cyclone2用在5v系统里使用方法,使得FPGA芯片在5V系统中兼容-cyclone and cyclone2 system used in the use 5v, making FPGA chip compatible with the 5V system
- 2022-02-03 17:24:31下载
- 积分:1
-
GPU_LDPC+硕士毕设论文详解
QC LDPC的编码译码 代码与论文配套 是研究生毕设 可运行 代码风格优秀(QC LDPC Coding and Decoding Code and Paper Matching are Excellent Style of Running Code for Graduate Students)
- 2021-05-14 19:30:07下载
- 积分:1
-
加法计数器的VHDL工程,程序,仿真图形
加法计数器的VHDL工程,程序,仿真图形-adder jishuqi de VHDL FANGZHEN ,CHENGXU
- 2022-01-25 14:28:29下载
- 积分:1
-
FIFO程序,适用FPGA仿真的代码,有一定的价值
FIFO程序,适用FPGA仿真的代码,有一定的价值-FIFO
- 2022-08-10 12:12:14下载
- 积分:1