configurable CRC Reference Design xilinx the ip, CRC_xapp562 reference design do...

verilog描述的实用消抖电路，采用三个D触发器和一个JK触发器。使用emacs编写源文件，iverilog仿真通过，内有png仿真图像截屏(verilog description of the practical elimination shake circuit, using three D flip-flop and a JK flip-flop. Prepared source files using the emacs , iverilog simulation adopted, within the simulation images png screenshots)

Altera DE2 上使用 vhdl 语言设计 RS232 控制器。这是一个串口模块可用于嵌入系统。

微分器：利用数字锁相环进行位同步信号提取的关键模块(Differentiator: the use of digital phase-locked loop for bit synchronous signal extraction of key modules)

LFSR模块，单个模块，实现移位寄存器，生成测试用pattern-LFSR

实现QAM调制功能和QAM解调功能的代码.(Realize QAM modulation function and QAM demodulation function code.)

FPGA功耗分析工具EPE用于分析FPGA系统的功耗(FPGA power analysis tools EPE is used to analyze the power consumption of the FPGA system)

Lift Controller in vhdl using process statement and state disgram

说明：  altera fpga 实现fft，用fft IP核，有matlab仿真代码(Altera FPGA implementation of FFT, FFT IP core, matlab simulation code)

在QUARTUS II上实现（7,4）汉明码的译码VHDL语言设计((7,4)Hamming decoder)

一个完整的viterbi译码程序和测试的程序-A complete viterbi decoding procedures and test procedures