adc0809的fpga时序电路接口程序

实现千兆以太网数据发送，通过GMII接口向PHY写数据，控制PHY发送数据。(Implementation of Gigabit Ethernet data transmission, write data to the PHY through the GMII interface, control PHY data.)

自己编的VGA彩条信号发生器verilog ise环境-Own the VGA color signal generator verilog ise Environment

FPGA做VGA通讯的详细资料，我找了很久才收集起的，很有用，可供初学者学习实用-FPGA to do VGA communication details, I am looking for a long time before starting the collection, very useful for beginners to learn practical

VHDL教学的经典之作，大家学习必看的书籍。-VHDL teaching classic, must-see U.S. study books.

应用背景VHDL  ；CPU设计...................................................................................................................................................................................................................................................................................................................................................................关键技术VHDL  ；CPU设计...................................................................................................................................

一个走马灯的程序,可以按照要求一个一个往后面按顺序点亮(A program for the lantern can be lit one by one according to the requirements.)

用Verilog编写的基于FPGA的按键边缘检测技术，通过此模块可以很好的消除在按键过程中因抖动或误按造成的 麻烦，同时，在边缘检测技术中使用了约翰逊计数器的思想，是的代码简介，思路清晰。源码中含有大量的注释，有助于读者更好地了解编码思想。

SPI串口的内核实现spicore SPI串口的内核实现spicore-SPI string mouth essence realizes spicore the SPI string mouth essence to realize spicore the SPI string mouth essence to realize spicore

使用430的四系点亮流水灯，内置有时钟函数，函数简单，值得一看(The four lines using 430 lit water lights, built-in clock function, the function is simple, eye-catcher)

实现米粒状态机 用verilog语言实现状态机的过程(Implement a state machine with a grain of rice verilog state machine language course)