基于FPGA数字频率计

含异步清零和同步清零的计数器的设计，内容是源代码，以及相关文件，打开即可(Clear cleared asynchronous and synchronous with the counter design, content source code and related documents, can be opened)

UML2 apprendre a modeliser a l aide de UML

关于硬件描述语言Verilog的135个经典实例，从易到难，对Verilog的编程有很大的帮助。(About the Verilog hardware description language 135 classic example, from easy to difficult, for Verilog programming of great help.)

verilog i2c master rtl+testbench 转自特权同学(verilog i2c master rtl+testbench)

MATLAB辅助设计数字滤波器源代码，QUATUS II 实现！(MATLAB-aided design of digital filter source code, QUATUS II implementation!)

说明：  串口操作源代码，本代码采用veilog hdl语言编写，并经过本人多次验证。(source code, the code used veilog HDL language, and after I repeatedly verified.)

Xilinx picoBlaze explained

It is the FSM implemented in Xylinx 14.7 on FPGA

 ；建立一个录音机，用于录制和播放8位数字音频样本。实现了一个低通FIR滤波器模块，可以用作抗混叠和重构滤波器。

很好的fft学习程序感兴趣的同学可以看哈，下载一下。(it is very good )