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GFP
这是一个EOS项目中的GFP成帧结构,能够容错,可以配置字节域(This is an EOS project GFP Framing structure, be able to fault-tolerant, can be configured byte domain)
- 2009-03-26 10:58:49下载
- 积分:1
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Uses Verilog the HDL design, obtains the realization basis on
the palm space int...
采用Verilog HDL设计,在掌宇智能开发板上得到实现
根据抢答器的原理,整个电路可划分为三部分:采样电路、门控电路和译码电路- Uses Verilog the HDL design, obtains the realization basis on
the palm space intelligence development board to snatch the answering
principle, the entire electric circuit may divide is three parts: The
sampling electric circuit, the gate control the electric circuit and
the decoding circuit
- 2022-03-16 23:36:15下载
- 积分:1
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tcpip_stack_v1_2
说明: 实现ARP、ICMP、UDP、TCP、IP和MAC全过程的传输,对TCP的连接、接收、发送、断开均经过测试,功能正常(Realize the transmission of ARP, ICMP, UDP, TCP, IP and MAC in the whole process, test the connection, reception, transmission and disconnection of TCP, and the function is normal)
- 2020-05-05 10:03:04下载
- 积分:1
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verilog 我自己写得按单脉冲发生器,通过了综合和仿真,和频率可变的正弦波发生器,...
verilog 我自己写得按单脉冲发生器,通过了综合和仿真,和频率可变的正弦波发生器,-verilog I write by a single pulse generator, through the synthesis and simulation, and variable frequency sine wave generator,
- 2022-04-19 00:17:00下载
- 积分:1
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SHIFT_8REG是8位的一个具有移位功能的寄存器,每一次数据打入都会从这个寄存器的最低位打入,并相应进行向左移位。
ODD_110BREG是一个3位的备...
SHIFT_8REG是8位的一个具有移位功能的寄存器,每一次数据打入都会从这个寄存器的最低位打入,并相应进行向左移位。
ODD_110BREG是一个3位的备份寄存器,寄存器中存放的是奇数帧的同步头,也就是110。
EVEN_9BHREG是一个8位的备份寄存器,寄存器中存放的是偶数帧的同步头,也就是10011011。这两个寄存器的初始值在系统一开始就打入。
-SHIFT_8REG is eight with a displacement of the functional Register, Each will enter the data from the register into the lowest point, and the left shift accordingly. ODD_110BREG is a three backup Register, the Register is stored in the odd frame synchronization head, is 110. EVEN_9BHREG 8 is a backup Register, which register is kept even the first frame synchronization, is 10011011. This register the two initial value of the system into a start.
- 2022-05-15 03:11:22下载
- 积分:1
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verilog实现的“BCD/七段译码器”。
verilog实现的“BCD/七段译码器”。-verilog implementation " BCD/Seven-Segment Decoder."
- 2022-12-23 05:15:02下载
- 积分:1
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modelsim_example_c
modelsim仿真,大量vhdl程序,验证,很有价值!(The ModelSim Simulation, a large number of VHDL procedures, validation, great value!)
- 2013-05-05 15:11:06下载
- 积分:1
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LED测试小程序
可实现任意频率的LED点灯形式,只需改变分频次数和赋值就可以得到想要的的结果。可实现任意频率的LED点灯形式,只需改变分频次数和赋值就可以得到想要的的结果。可实现任意频率的LED点灯形式,只需改变分频次数和赋值就可以得到想要的的结果。可实现任意频率的LED点灯形式,只需改变分频次数和赋值就可以得到想要的的结果。可实现任意频率的LED点灯形式,只需改变分频次数和赋值就可以得到想要的的结果。可实现任意频率的LED点灯形式,只需改变分频次数和赋值就可以得到想要的的结果。可实现任意频率的LED点灯形式,只需改变分频次数和赋值就可以得到想要的的结果。可实现任意频率的LED点灯形式,只需改变分频次数和赋值就可以得到想要的的结果。可实现任意频率的LED点灯形式,只需改变分频次数和赋值就可以得到想要的的结果。
- 2022-01-22 11:14:15下载
- 积分:1
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EDA 双向端口的输入输出程序 快点来下在啊
EDA 双向端口的输入输出程序 快点来下在啊 -EDA port bi-directional input and output procedures to hurry up in the ah
- 2022-04-22 18:44:53下载
- 积分:1
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CAN驱动器-MCP2515-接口程序-Verilog
CAN驱动器MCP2515驱动,verilog编写,实测可用(CAN driver MCP2515 driver, Verilog written, measured available)
- 2020-12-28 15:29:02下载
- 积分:1