matlab导弹三维制导

这个是我本科的毕业设计，自己放着也没用，所以贡献给大家，同时也是本人积分太少，想赚点积分。这个用的是STM32+ENC28J60+LWIP协议栈实现的智能家居，通过网页来控制板子上的LED灯，同时实时刷新STM32时间和温度。网页是用记事本用HTML编写的，直接用记事本打开就能看网页代码，网页代码和图片都通过转码后存在单片机内部。用AJAX通讯方式来和浏览器通讯，用少量数据来刷新时间，而不是刷新整个网页。

The Verilog® Hardware Description Language (Verilog HDL) became an IEEE standard in 1995 as IEEEStd 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstraction in astandard textual format for a variety of design tools, including verification simulation, timiThe clear directive from the users for these three task forces was to start by solving some of the followingproblemsConsolidate existing IeeE Std 1364-1995Verilog generate statementMulti-dimensional arraysEnhanced Verilog file i/oRe-entrant tasksStandardize Verilog configurationsEnhance timing representationEnhance the vpi routinesAchievementsOver a period of four years the 1364 Verilog Standards Group(vsg) has produced five drafts of the lrmThe three task forces went through the EEe Std 1364-1995 lRM very thoroughly and in the process of consolidating the existing Lrm have been able to provide nearly three hundred clarifications and errata for theBehavioral, ASIC, and PLI sections. In addition, the vsg has also been able to agree on all the enhance-ments that were requested (including the ones stated above)Three new sections have been added. Clause 13, "Configuring the contents of a design, deals with configuration management and has been added to facilitate both the sharing of verilog designs between designersand/or design groups and the repeatability of the exact contents of a given simulation session Clause 15Timing checks, "has been broken out of Clause 17, "System tasks and functions, "and details more fullhow timing checks are used in specify blocks. Clause 16, "Backannotation using the Standard Delay Format(SDF), addresses using back annotation(IEEE Std 1497-1999)within IEEE Std 1364-2001Extreme care has been taken to enhance the vpi routines to handle all the enhancements in the behavioraland other areas of the lrm. minimum work has been done on the pli routines and most of the work hasbeen concentrated on the vpi routines. Some of the enhancements in the vpi are the save and restart simu-lation control, work area access, error handling, assign/deassign and support for array of instances, generateand file 1/0Work on this standard would not have been possible without funding from the cas society of the ieee andOpen verilog InternationalThe IEEE Std 1364-2001 Verilog standards Group organizationMany individuals from many different organizations participated directly or indirectly in the standardizationprocess. The main body of the Ieee Std 1364-2001 working group is located in the United States, with asubgroup in Japan (EIAJ/1364HDL)The members of the IEEE Std 1364-2001 working group had voting privileges and all motions had to beapproved by this group to be implemented the three task forces focused on their specific areas and theirrecommendations were eventually voted on by the Ieee Std 1364-2001 working group

用C语言写的一个数据结构课程设计，该程序实现了20*20棋盘大小的五子棋人工智能对战游戏程序，支持网络对战、支持双人游戏、支持棋局录制与重放，还有音乐播放功能 。（最重要的是包含课程设计文档，和程序的源代码）。

小波阈值去噪的程序，包括默认阈值去噪、全局阈值去噪、自适应阈值去噪。

EasyKrig_V3.0_Matlab2012a.zip。是大师对之前的那个版本的最新修改，修改了很多的错误，而且计算效率有所提高，是我在网上搜索很久才找到的最好的、最有效的克里金插值程序。适合二维和三维的数据、大量的数据点的插值！

标准粒子群算法程序，和含变异算子的改进PSO编程方法，有程序说明和测试函数，使用是只要把测试函数换下就好了！

用于激光焊接 熔覆 等fluent仿真有初始化文件 材料物性定义 激光移动热源 传导系数等等文件udfinitialization_1.cudfinitialization_2.cudfsource.cudfsource_heat.cudf i64_spec_T.cudfudf_density_temp.cudfudf_heatconductivity_temp1.cudfviscosity-temp2.cudf

人工智能选股框架及经典算法简介华泰人工智能系列之一人工智能和机器学习并不神秘人工智能和机器学习方法并不神秘，其本质是以数理模型为核心工具，结合控制论、认知心理学等其它学科的研究成果，最终由计算机系统模拟人类的感知、推理、学习、决策等功能。理解常用的机器学习算法，有助于澄清对人工智能的种种误解和偏见，帮助我们更清晰地认识人工智能的长处和局限，从而更合理、有效地将人工智能运用于投资领域。

visio 模具 visio2010 visio2013,尽情下吧！！

大津法及最优迭代求分割阈值（opencv2），采用了该文献中的代码思想并作了修改。大津法OSTU：http://blog.csdn.net/guoyk1990/article/details/7606032迭代的最优阈值选择：http://blog.csdn.net/lichengyu/article/details/4775974 ，这篇文中附的代码有问题，做了修改。