MicroElectronic Circuit Design
微电子电路设计第五版,Richard C. Jaeger, Traveis N. Blalock编著。FIETH EDITIONMICROELECTRONICHM-M- CIRCUIT DESIGNRICHARD C. JAEGERAuburn UniversityTRAVIS N. BLALOCKUniversity of VirginiaMcGrawEducationGrawEducationMICROELECTRONIC CIRCUIT DESIGN. FIFTH EDITIOPublished by McGraw-Hill Education, 2 Penn Plaza, New York, NY 10121 CopyrightC 2016 by McGraw-Hill EducationAll rights reserved. Printed in the United States of America. Previous editions 2011, 2008, and 2004. No part of thispublication may be reproduced or distributed in any form or by any means, or stored in a database or retrieval system,without the prior written consent of McGraw-Hill Education, including, but not limited to, in any network or otherelectronic storage or transmission, or broadcast for distance learninSome ancillaries, including electronic and print components, may not be available to customers outside the United StatesThis book is printed on acid-free pape1234567890DOw/DOw1098765ISBN978-0-07-352960-8MHID0-07-352960-5sident Products markets Kurt LVice President, General Manager, Products Markets: Marty Langece President, Content Design Delivery: Kimberly Meriwether DavidManaging director: Thomas TimpGlobal Publisher Raghu srinivasanDirector. Prodrelopment: RoDirector, Digital Content Development: Thomas Scaife, Ph DProduct develoVincent brashMarketing manager: Nick Mc faddenDirector, Content Design Delivery: Linda avenariusProgram meSchillingContent Project Managers: Jane Mohr, Tammy Juran, and Sandra M. SchneeBuyer: Jennifer PickelDesign: Studio Montage, St Louis, MOContent Licensing Specialist: DeAnna DausenerCompositor: MPS LimitedPrinter.R. DonnellAll credits appearing on page or at the end of the book are considered to be an extension of the copyright pageLibrary of Congress Cataloging-in-Publication DataJaeger. Richard cMicroelectronic circuit design/Richard C. Jaeger, Auburn University,Travis N. Blalock, University of Virginia. --Fifth editionpages cmIncludes bibliographical references and indexISBN978-0-07-352960-8(alk. paper)-ISBN0-07-338045-8(alk. paper)d 1. Integrated circuits--Design and construction. 2. Semiconductors--Design and construction. 3. Electronic circuitesign. I. Blalock, Travis N. Il. TitleTK7874.J3332015621.3815-dc232014040020The Internet addresses listed in the text were accurate at the time of publication. The inclusion of a website does not indicatean endorsement by the authors or McGraw-Hill Education, and McGraw-Hill Education does not guarantee the accuracy ofthe information presented at these siteswww.mhhe.comTOTo Joan, my loving wife and life long partnerRichard C. JaegerIn memory of my father, Professor Theron vaughnBlalock, an inspiration to me and to the countlessstudents whom he mentored both in electronicdesign and in life.Travis n blalockBRIEF CONTENTSPreface xxChapter-by-Chapter Summary XXV12 Operational Amplifier Applications 685PART ONE13 Small-Signal Modeling and LinearSOLID-STATE ELECTRONICS AND DEVICESAmplification 77014 Single-Transistor Amplifiers 8411 Introduction to Electronics 32 Solid-State Electronics 4115 Differential Amplifiers and Operational Amplifier3 Solid-state Diodes and Diode circuits 72Design 9524 Field-Effect Transistors 14416 Analog Integrated Circuit Design Techniques 10315 Bipolar Junction Transistors 21517 Amplifier Frequency Response 111318 Transistor Feedback Amplifiers andPART TWOOscillators 1217DIGITAL ELECTRONICSAPPENDICES6 Introduction to Digital Electronics 2837 Complementary MOS (CMOS) Logic Design 359A Standard Discrete Component Values 12918 MOS Memory Circuits 414B Solid-State Device Models and sPIce simulationParameters 12949 Bipolar Logic Circuits 455C TWo-Port Review 1299PART THREIndex 1303ANALOG ELECTRONICS10 Analog Systems and Ideal OperationalAmplifiers 51711 Nonideal Operational Amplifiers and FeedbackAmplifier Stability 587CONTENTSPreface xxCHAPTER 2Chapter-by-Chapter Summary XXVSOLID-STATE ELECTRONICS 41PART ONE2.1 Solid-State Electronic materials 432.2 Covalent bond model 44SOLID-STATE ELECTRONICS2.3 Drift Currents and mobility inAND DEVICES 1Semiconductors 472.3.1 Drift Currents 47CHAPTER 12.3.2 Mobility 48INTRODUCTION TO ELECTRONICS 32.3.3 Velocity Saturation 482.4 Resistivity of Intrinsic Silicon 491.1 A Brief History of Electronics: From2.5 Impurities in Semiconductors 50Vacuum Tubes to Giga-Scale Integration 52.5.1 Donor Impurities in silicon 511.2 Classification of Electronic Signals 82.5.2 Acceptor Impurities in Silicon 511.2.1 Digital signals 92.6 Electron and hole concentrations in1.2.2 Analog Signals 9Doped semiconductors 511.2.3 A/D and D/A Converters--Bridging2.6.1Type Material (ND >NA)52the analog and Digital2.6.2 p-Type Material (N,A>ND)53Domains 102.7 Mobility and Resistivity in Doped1.3 Notational conventions 12Semiconductors 541.4 Problem-Solving Approach 132.8 Diffusion currents 581.5 Important Concepts from Circuit2. 9 Total Current 59Theory 152.10 Energy Band Model 601.5.1 Voltage and current Division 152.10.1 Electron-Hole pair generation in1.5.2 Thevenin and norton circuitan intrinsic semiconductor 60Representations 162.10.2 Energy Band Model for a Doped1.6 Frequency Spectrum of ElectronicSemiconductor 61Signals 212.10.3 Compensated semiconductors 611.7 Amplifiers 222.11 Overview of Integrated circuit1.7.1 Ideal operational amplifiers 23Fabrication 631.7.2 Amplifier Frequency Response 25Summary 661.8 Element Variations in Circuit Design 26Key Terms 671.8.1 Mathematical modeling ofReference 68Tolerances 26Additional Reading 681.8.2 Worst-Case Analysis 27Problems 688.3 Monte Carlo analysis 291.8.4 Temperature Coefficients 32CHAPTER 31.9 Numeric Precision 34SOLID-STATE DIODES AND DIODE CIRCUITS 72Summary 34Key Terms 353.1 The pn Junction Diode 73References 363.1.1 pn Junction Electrostatics 73Additional Reading 363.1.2 nternal diode currents 77Problems 363.2 The i-v Characteristics of the diode 78VIllContents3.3 The Diode Equation: A Mathematica3.15 Full-Wave Bridge Rectification 123Model for the diode 803.16 Rectifier Comparison and Design3.4 Diode Characteristics under reverse, ZeroTradeoffs 124and forward bias 833.17 Dynamic Switching Behavior of the Diode 1283.4.1 Reverse bias 833.18 Photo diodes, solar cells, and3. 4.2 Zero bias 83Light-Emitting Diodes 1293.4.3 Forward Bias 843.18.1 Photo diodes and3.5 Diode Temperature Coefficient 86Photodetectors 1293.6 Diodes under reverse bias 863.18.2 Power Generation from Solar Cells 1303.6.1 Saturation Current in real3.18. 3 Light-Emitting Diodes(LEDs)13Diodes 87Summary 1323.6.2 Reverse Breakdown 89Key Terms 1333.6.3 Diode model for the breakdownReference 134Region 90Additional Reading 1343.7 pn Junction Capacitance 90Problems 1343.7.1 Reverse bias 903.7.2 Forward Bias 91CHAPTER 43.8 Schottky Barrier Diode 933.9 Diode SPICE Model and layout 93FIELD-EFFECT TRANSISTORS 1443.9.1 Diode Layout 944.1 Characteristics of the MOS Capacitor 1453.10 Diode Circuit Analysis 954.1.1 Accumulation Region 1463.10.1 Load-Line Analysis 964.1.2 Depletion Region 1473.10.2 Analysis Using the Mathematical4.1.3 Inversion Region 147Model for the diode 974.2 The nmos transistor 1473.10.3 The Ideal diode model 1014.2.1 Qualitative i-v Behavior of the3.10.4 Constant Voltage Drop Model 103NMOS Transistor 1483.10.5 Model Comparison and4.2.2 Triode Region Characteristics ofDiscussion 104the nmos transistor 1493.11 Multiple-Diode Circuits 1054.2.3 On Resistance 1523.12 Analysis of Diodes Operating in the4.2.4 Transconductance 153Breakdown Region 1084.2.5 Saturation of the i-v3.12.1 Load-Line Analysis 108Characteristics 1543.12.2 Analysis with the Piecewise4.2.6 Mathematical model in theLinear model 108Saturation (Pinch-off)3.12.3 Voltage regulation 109Region 1553.12.4 Analysis Including Zener4.2.7 Transconductance in saturation 156Resistance 1104.2.8 Channel-Length Modulation 1563.12.5 Line and Load Regulation 1114.2.9 Transfer characteristics and3.13 Half-Wave Rectifier Circuits 112Depletion-Mode MosFETs 1573.13.1 Half-Wave Rectifier with resistor4.2.10 Body Effect or SubstrateLoad 112Sensitivity 1593.13.2 Rectifier Filter Capacitor 1134.3 PMOS Transistors 1603.13.3 Half-Wave Rectifier with rc load 1144.4 MOSFET Circuit Symbols 1623. 13.4 Ripple Voltage and Conduction4.5 Capacitances in MOS Transistors 165Interval 1154.5.1 NMOs Transistor Capacitances in3.13.5 Diode Current 117the Triode region 1653.13.6 Surge Current 1194.5.2 Capacitances in the Saturation3.13.7 Peak-Inverse-Voltage(PlV)Rating 119Region 1663.13.8 Diode Power Dissipation 1194.5.3 Capacitances in Cutoff 1663.13.9 Half-Wave Rectifier with Negative4.6 MOSFET Modeling in SPICE 167Output Voltage 1204.7 MOS Transistor Scaling 1683.14 Full-Wave Rectifier Circuits 1224.7.1 Drain Current 1693. 14.1 Full-Wave Rectifier with Negative4.7.2 Gate Capacitance 169Output Voltage 1234.7.3 Circuit and power densities 169ContentsIX4.7.4 Power-Delay Product 1705.3 The pnp Transistor 2234.7.5 Cutoff Frequency 1705.4 Equivalent Circuit Representations for the4.7.6 High Field Limitations 171Transport Models 2254.7.7 The unified mos transistor model5.5 The i-v Characteristics of the bipolarIncluding High Field Limitations 172Transistor 2264.7.8 Subthreshold conduction 1735.5.1 Output Characteristics 2264.8 MOs Transistor Fabrication and layout5.5.2 Transfer characteristics 227Design Rules 1745.6 The Operating Regions of the Bipolar4.8.1 Minimum Feature size andTransistor 227Alignment Tolerance 1745.7 Transport Model Simplifications 2284.8.2 Mos Transistor Layout 1745.7.1 Simplified Model for the Cutoff4.9 Biasing the NMOS Field-EffectRegion 229Transistor 1785.7.2 Model Simplifications for the4.9.1 Why Do We Need Bias? 178Forward-Active Region 2314.9.2 Four-Resistor Biasing 1805.7.3 Diodes in Bipolar Integrated4.9.3 Constant Gate-Source VoltageCircuits 237Bias 1845.7.4 Simplified Model for the4.9.4 Graphical analysis for theReverse-Active Region 238Q-Point 1845.7.5 Modeling Operation in the4.9.5 Analysis Including Body Effect 184Saturation Region 2404.9.6 Analysis Using the Unified5.8 Nonideal Behavior of the bipolarModel 187Transistor 2434.10 Biasing the PMos Field-Effect Transistor 1885.8.1 Junction Breakdown Voltages 2444.11 The junction Field-Effect Transistor5.8.2 Minority-Carrier Transport in theUFET190Base Region 2444.11.1 The JFET With Bias Applied 195.8.3 Base Transit time 2454.11.2 JFET Channel with Drain-Source5.8.4 Diffusion Capacitance 247Bias 1935.8.5 Frequency Dependence of the4.11.3 n-Channel jfet i-v Characteristics 193Common-Emitter current gain 2484.11.4 The p-Channel JFET 1955.8.6 The Early Effect and Early4.11.5 Circuit Symbols and JFET ModelVoltage 248Summary 1955.8.7 Modeling the Early Effect 2494.11.6 JFET Capacitances 1965.8.8 Origin of the Early Effect 2494.12 JFET Modeling in Spice 1965.9 Transconductance 2504.13 Biasing the JFET and Depletion-Mode5.10 Bipolar Technology and sPiCe Model 251MOSFET 1975.10.1 Qualitative Description 251Summary 2005.10.2 SPICE Model Equations 252Key Terms 2025.10.3 High-Performance BipolarReferences 202Transistors 253Problems 2035.11 Practical bias circuits for the bjt 2545.11.1 Four-Resistor bias network 256CHAPTER 55.11.2 Design Objectives for theBIPOLAR JUNCTION TRANSISTORS 215Four-Resistor bias network 2585.11.3 terative Analysis of the5.1 Physical Structure of the BipolarFour-Resistor bias circuit 262Transistor 2165.12 Tolerances in bias circuits 2625.2 The Transport Model for the npn5. 12.1 Worst-Case Analysis 263Transistor 2175. 12.2 Monte Carlo Analysis 2655.2.1 Forward Characteristics 218Summary 2685.2.2 Reverse Characteristics 220Key Terms 2705.2.3 The Complete Transport ModelReferences 270Equations for Arbitrary BiasProblems 271Conditions 221
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16×64LED点阵显示屏的设计(附完整proteus仿真图和源程序)
16×64LED点阵显示屏的设计(附完整proteus仿真图和源程序)答辩记录1、例举设计过程中遇到的问题及其解决方法(至少两例)。答:(1)问题说明:解决方法:(2)问题说明:解决方法2、教师现场提的问题记录在此(不少丁2个问题)《单片机原理及应用》课程设计摘要LED电子显示屏是利川发光二极管构成的点阵模块或像素单元组成可变面积的显示屏幕,在信息显示领域得到了广泛的应用,实现显示屏的技术也有很多和。本文介绍了基于单片机80C51为控制器的16×64LED点阵显示屏系统的设计。整机以美国 ATMEL公司生产的40脚单片机AT89C51为核心,介绍了以它为控制系统的LED点阵电子显示屏的动态设计和开发过程。通过该芯片控制一个行驱动器74LS154和八个列驱动器74HC595米驱动显示屏显示。该电子显示屏可以显示各种文字或单色图像,全屏能显示4个汉字,采用16块8×8点阼LED显示模块来组成一个16×64点阼显示模式。显示采用动态显示,使得图形或文字能够实现静止、移入移出等多种显示方式。本文介绍了利用 Proteus7.10软件进行原理图的绘制,利用汉字转换软件将汉字转换为将要发送给单片机的点阵数据,在keil软件当中采用C语言编程,与 proteus进行联调,并通过仿真软件Proteus7.10最终实现自己设想的效果,总体上系统的设计简单、显示清晰、成本较低。关键词:单片机;LED;点阼屏;c语言《单片机原理及应用》课程设计目录摘要设计任务基本要求选做设计方案点阵屏显示模块原理数据传输方案系统硬件电路的设计单片机系统及外围电路点阵显示屏设计点阵显示器的扫描驱动系统软件的设计显示驱动程序系统主程序总结参考文献附录:总设计图附录:总源程序《单片机原理及应用》课程设计设计任务从LED材料的不断更新,灰度控制技术的发展,真彩色图像的展现:到驱动电路的灵活、高效,控制系统技术的提高无不体现了LED行业技术的飞跃发展另外,随着计算机的网路技术的发展,LE显示屏在网路环境下的使用情况越来越多,在多媒体、多和显示设备组成的信息显示系统中,采用智能化网路控制,联网控制多屏技术也在实际屮得到应用。本文讨论了利用单片机为控制信号完成一个点阵显示屏系统的设计。11基本要求设计一款能够显示不同字符的点阵广告牌;2.设计不同的字符切换效果(如內烁,静止,平移等);设计控制按钮,可以在不同的效果间切换;12选做4能够显示图形或自定义字符5通过串行口从电脑上下载更新需显示的字符6其他功能(创新部分)图示例图《单片机原理及应用》课程设计设计方案21点阵屏显示模块原理四个8×8的点阵构成一个16×16的点阵,共由256个LED构成。如果LED的阴极与行相连,而阳极与列相连,那么只要给该LED对应的行以低电平,列以高电平,那么对应的LED就发光。图2-1画岀了可显示一个汉字的16×16的点阵屏模块。这种模块由256个发光LED以16×16的形式构成一个正方形模块,然后引出2列16针的引脚将内部电路接口引出,供驱动电路使用0200100fFC200生400gfEO004000800100TFFE010010001000005000200图2.1LED点阵显示原理图行对应的给LED的阴极,先给第一行以低电平,如果送给16列的代码为0200,则第一行的第7个LED被点亮,再给第二行以低电平,如果送给16列的代码为0100,则第二行的第8个被点亮,接着给第三行以低电平,同时给列以动代码,这样不断地进行行行的扫摧,只要速度够快,由于人的祧觉暂留作用,就不会感觉釗明显的闪烁感。点阵上会看到一个清晰的“字”字《单片机原理及应用》课程设计22数据传输方案显然,采用并行方式时,从控制电路到列驱动器的线路数量大,相应的硬件数目多。当列数很多时,并列传输的方案是不可取的。采用牛行传输的方法,控制电路可以只用根信号线,将列数据位一位传往列驱动器,在硬件方面无疑是卜分经济的。但是,串行传输过程较长,数据按顺序一位一位地输出给列驱动器,只有当一行的各列数据都以传输到位之后,这行的各列才能并行地进行显小。这样,对于一行的显小过程就可以分解成列数据准备(传输)和列数据显示两部分。对于串行传输方式来说,列数据准备时间可能相当长,在行扫描周期确定的情况下留给行显示的时间就人少了,以致影响到LED的亮度。解决串行传输中列数据准备和列数据显示的时间矛盾问题,可以采用重叠处理的方法。即在显示本行各列数据的同时,传送下一列数据。为了达到重叠处理的目的,列数据的显示就需要具有所存功能。经过上述分析,就可以归纳出列驱动器电路应具有的功能。对于列数据准备来说,它应能实现串入并处的移位功能;对于列数据显示来说,应具有并行锁存的功能。这样,本行已准备好的数据打入并行锁存器进行显示时,串并移位寄存器就可以准备下一行的列数据,而不会影响行的显示。图22为显示屏电路实现的结构框图列驱动列驱动列驱动列驱动单片机控制器行驱动6×6LED16×⊥6LED16×16LED6×6LED点阵点阵点阵点阵图点阵显示屏系统框图《单片机原理及应用》课程设计系统硬件电路的设计本系统采用单片机作控制器。整个电路主要由单片机控制及其接口电路、驱动显小电路、电源电路等部分纽成。为了简化显示屏电路,降低成本,本系统在单片机部分不加字库存储器,而在机上编辑汉字和字符显示信息,并将其转换为相应的点阵显示数据。然后通过串口送给单片机存储并进行显示处理使件电路大致上可以分成单片机系统及外围电路、列驱动电路和行驱动电路部分。31单片机系统及外围电路单片机采用MSC-51或其兼容系列芯片,采用24MHZ或更高频率晶振,以获得较高的刷新频率,时期显小更稳定。单片机的串口与列动器相连,用来显小数据。P1口低4位与行驱动器相连,送出行选信号;P1.5~P1.7口则用来发送控制信号MSC51单片机部分管脚说明如下:P0口:P0口为一个8位漏级开路刈向I/0口,每脚可吸收8TTL门电流。当P凵的管脚第次写1时,被定义为高阻输入。P0能够用于外部程序薮据存储器,它可以被定义为数据/地址的第八位P1凵:P1凵是一个内部提供上拉电阻的8位双向I/0凵,P1凵缓冲器能接收输出4L门电流。P1口管脚写入1后,被内部上拉为高,可用作输入,P1口被外部下拉为低电平时,将输出电流,这是由于内部上拉的缘故。在 FLASH编程和校验时,P1口作为第八位地址接收P2凵:P2凵为一个内部上拉电阻的8位双向I0凵,P2凵缓冲器可接收输出4个TL门流,当P2口被写“1”时,其管脚被内部上拉电阻拉高,且作为输入。并因此作为输入时,P2口的管脚被外部拉低,将《单片机原理及应用》课程设计输出电流。这是由于内部上拉的缘故。P2口当用于外部程序存储器或16位地址外部数据存储器进行存取时,P2口输出地址的高八位。在给出地址“I”时,它利用内部上拉优势,当对外部八位地址数据存储器进行读写时,P2凵输出其特殊功能寄存器的内谷。P2凵在 FLASH编程和校验时接收高八位地址信号和控制信号。P3口:P3口管脚是8个带内部上拉电阻的双向I/0口,可接收输出4个TTL门电流。当P3凵写入“1”后,它们被内部上拉为髙电平,并用作输入。作为输入,由亍外部下拉为低电平,P3凵将输出电流(IL)这是由于上拉的缘故RST:复位输入。当振荡器复位器件时,要保持RST脚两个机器周期的高电平时间XTAL1:反向振荡放大器的输入及内部时钟工作电路的输入。XTAL2:来自反向振荡器的输出。CF气x1灯TAP0ADD□P0.2/AD236C2F4/D4F0.5AD5PO, 3JAD6RSTPO.7/A07A3t4C3H山ARo 1nFP2.2A10PSENP2.3A|1ALEF2.4inP2541328P25A1427P27A|5P123P3. 0/RXD F10F1.1/2EP3. ITXDP3 2/NT0F13P1361. 4P34/014P3 6R16PC/FD17B9C54图单片机最小系统原理图
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