-
OFDMA System Analysis and Design
OFDMA系统分析与设计的国外经典教材Chapter 1 Introduction to OFDM and OFDMAChapter 2 Characterization of the Mobile Wireless ChannelChapter 3 Fundamentals of Digital Communications and NetworkingChapter 4 Fundamentals of OFDM and OFDMA: Transceiver StructureChapter 5 Physical Layer: Time and FrequencyChapter For a listing of recent titles in theArtech House Mobile Communications Library,turn to the back of this bookOFDMA System Analysis and DesignSamuel C. YangARTECHHOUSEBOSTON LONDONartechhouse. comLibrary of Congress Cataloging-in-Publication DataA catalog record for this book is available from the U.S. Library of CongressBritish Library cataloguing in Publication DataA catalogue record for this book is available from the british libraryISBN-13:978-1-60807-076-3Cover design by vicki KaneC 2010 Artech House685 Canton streetNorwood. MA 02062All rights reserved. Printed and bound in the United States of America. No partof this book may be reproduced or utilized in any form or by any means, elec-tronic or mechanical, including photocopying, recording, or by any informationstorage and retrieval system, without permission in writing from the publisherAll terms mentioned in this book that are known to be trademarks or servicemarks have been appropriately capitalized artech House cannot attest to theaccuracy of this information. Use of a term in this book should not be regardedas affecting the validity of any trademark or service mark10987654321To my beautiful wife JennyContentsPrefaceAcknowledgmentsXVCHAPTER TIntroduction to ofdm and ofdma1.1 Motivation1.2 Conventional FDm1.3 Advantages of FDm1.3.1 Intersymbol Interference(ISI)and Multipath Fading1.3.2 Modulation and Coding per Subcarrier1.3.3 Simple equalization1.4 Disadvantages of FDM1.5 Basics of ofdm1.6 Advantages of OFDM1.6.1 Low-Complexity modulation1.6.2 Spectral Efficiency1.7 Basics of ofdma1.8 Advantages of OFDMA121.9 Some Practical issues of ofdm and ofdma1.9.1 Time Domain: Interblock Interference131.9.2 Frequency Domain: Intercarrier Interference131.10 OFDM and Dsss141.11 Overview of the book14References15Selected BibliographyCHAPTER 2Characterization of the mobile wireless channel2.1 Introduction2.2 Link analysis2.3 Distance Dimension: Propagation Loss2.3.1 Path Loss2.3.2 Shadowing Loss24Contents2.3.3 Multipath Fading26Example 2.1282.3.4 Concluding Remarks292.4 Time Dimension: Multipath Delay Spread302.4.1 Delay Spread30Example 2.231Example 2.3312. 4.2 Coherence bandwidth322.4.3 Implications for OFDM352.5 Frequency Dimension: Doppler Spread362.5.1 Doppler Spread36Example 2. 4372.5.2 Coherence time2.5.3 Implications for OFDM402. 6 Conclusions41References43Selected Bibliography44ChAPTER 3Fundamentals of Digital Communications and Networking453.1 Introduction453.2 Basic Functions of a Transceiver453.3 Channel Coding473.3.1 Linear block codes473.3.2 Convolutional codes493.4 Symbol mapping and modulation3.5 Demodulation563. 5. 1 Matched Filter563.5.2 Symbol Error3.6 Adaptive Modulation and Coding603.7 Cyclic Redundancy Check(CRC)623.8 Automatic Repeat Request(arQ)643.8.1 Stop-and-Wait ARQ643.8.2 Sliding Window arQ653.9 Hybrid ARQ67References69Selected bibliographyCHAPTER 4Fundamentals of ofdm and ofdma: transceiver structure4.1 Basic Transmitter functions714.2 Time domain: guard time4.3 Frequency Domain: Synchronization744.4 Basic receiver functions754.5 Equalization764.6 OFDM Symbol79Contents4.7 OFDMA Transmitter844. 8 OFDMA Receiver4.9 OFDMA4.9.1 Frequency diversity4.9.2 Multiuser diversity914.9.3 Concluding Remarks4.10 Peak-to-Average Power ratio924.11 Conclusions93References94Selected Bibliography95CHAPTER 5Physical Layer: Time and Frequency975.1 Introduction5.2 Distributed Subcarrier Permutation: Forming Subchannels onDownlink5.2.1 Full Usage of Subchannels(FUSC1005.2.2 Partial Usage of Subchannels(PUSC)1015.2.3 Tile Usage of Subchannels 1(TUSC1)1025.2.4 Tile Usage of Subchannels 2(TUSC2)1025.3 Distributed Subcarrier Permutation: Forming Subchannels on Uplink 1025.3.1 Partial Usage of Subchannels(PUSC)1035.3.2 Optional Partial Usage of Subchannels(Optional PUSC)1035.4 Adjacent Subcarrier Permutation: Downlink and Uplink1045.5 Summary of Subcarrier Permutation Modes1045.6 Bursts and Permutation Zones1055.7 Subframes and frames1075.7.1 Preamble1105.7.2 Frame Control Header(FCH)1105.7.3 Downlink MAP (DL-MAP)and Uplink MAP(UL-MAP1115. 8 TDD and FDD5. 9 System Design Issues1125.9.1 Frequency Diversity and multiuser diversity1125.9.2 Segmentation1125. 10 Adaptive burst profiles1155.10.1 Burst Profiles1155.10.2 Channel Quality Feedback116References117ChAPTER 6Physical Layer: Spatial Techniques1196.1 Introduction6.2 Spatial Diversity: Receive Diversity1206.2.1 Receive Diversity: Antenna Selection1226.2.2 Receive Diversity: Maximal Ratio Combining6.3 Spatial Diversity: Transmit Diversity123Contents6.3. 1 Transmit Diversity: Open-Loop 2 X 11246.3.2 Transmit Diversity: Open-Loop 2X 21266.3.3 Transmit Diversity: Closed-Loop Antenna Selection128Example 6.11296.3.4 Transmit Diversity: Closed-Loop precoding1306.3.5 Remarks1326.4 Spatial Multiplexing1336.5 MIMO-OFDM1366.6 Beamforming1366.7 System Design Issues139References140Selected Bibliography141CHAPTER 7Medium Access control: architecture and data plane1437.1 MAC Architecture1437.2 Convergence Sublayer1457. 2.1 Address Mapping( Classification1467. 2.2 Header Suppression1467. 3 Common Part Sublayer1477.3.1ARQ1477. 3.2 MAC SDU and MAc pdu1487.3.3 Fragmentation/Packing1497.4 Security Sublayer152References152chaPTeR 8Medium Access Control Lower Control plane1538. 1 Introduction1538.2 Scheduler1538.3 Bandwidth Request1558.3.1 Request in Existing Uplink Allocation1568.3.2 Unicast Polling1568.3.3 Multicast and Broadcast Polling1578.3.4 Contention-Based Request for OFDMA1578.4 Control Signaling1588.5 Ranging1598.5.1 Initial Ranging1598.5.2 Periodic Ranging1608.5.3 Handover ranging1618.6 Power Control1618.6.1 Uplink Power Control: Closed-Loop1648.6.2 Uplink Power Control: Open-Loop1668.6.3 Assignment of Uplink Modulation and Coding8.6.4 Concluding Remarks168References169ContentsChaPTER 9Medium Access Control: Upper Control plane1719.1 Introduction1719.2 Network Entry1719.2. 1 Synchronization with Downlink of Base Station and acquisitionof parameters1739.2.2 Initial Ranging1739. 2.3 Negotiation of Mobile Capabilities1749.2.4 Security Procedures1749.2.5 Mobile registration1759.2.6 IP Connectivity1759.2.7 Connection Setup1769.3 Mobility Management: Link Handover1769.3.1 Cell Reselection1779.3.2 Hard Handover(HHO1799.3.3 Macro Diversity Handover(MDHO)1849.3.4 Fast Base Station Switching(FBSS1879.3.5 System Design Issue: H Add and h delete1899.3.6 Concluding Remarks1919.4 Mobility management: Network handover192References192CHAPTER 10Quality of Service(Qos)19510.1 Introduction19510.2 Definitions and Fundamental Concepts19510.2.1 Service Flows and Qos Parameters19510.2.2 Connections19610.3 Object Relationship Model19710.4 Service flow transactions19910.4.1 Creating a Service Flow19910.4.2 Changing a Service Flow20010.4.3 Deleting a Service Flow20310.5 QoS Parameters20410.6 Scheduling Services20610.6.1 Unsolicited Grant Service(UGS)20610.6.2 Real-Time Polling Service(rtPS20710.6.3 Extended Real-Time Polling Service(ertPS20710.6.4 Nonreal-Time Polling Service(nrtPS20810.6.5 Best Effort(BE)20810.6.6 Remarks209References210
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《基于FPGA的QPSK调制解调电路设计与实现》附VHDL程序!
数字调制解调技术在数字通信中占有非常重要的地位,数字通信技术与FPGA的结合是现代通信系统发展的一个必然趋势。文中介绍了QPSK调制解调的原理,并基于FPGA实现QPSK调制解调电路。MAX+PLUSII环境下的仿真结果表明了该设计的正确性。
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LabVIEW步进电机控制.vi
LabVIEW步进电机控制.vi
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分析了间歇混沌模型振子的混沌特性, 利用 振子的非平衡相变对微小信号具 有敏感性及对白噪声和与参考信号频差较大的周期干扰信号具有免疫力的性质, 采用混沌振子阵列实现 对噪声背景下微弱信号的检测; 并采用梅尔尼科夫方法作为混沌判据, 该方法的优点在于可以直接进行解 析计算。仿真实验表明: 该检测方法简单、 有效,测的精度比较高
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Windows API开发详解:函数、接口、编程实例---源代码
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基于FPGA的直流电机
①定义输出或输入为直流电能的旋转电机,称为直流电机,它是能实现直流电能和机械能互相转换的电机。
②用PWM(Pulse Width Modulation)方式来控制转速;通过脉冲波输入的引脚来控制方向。
③本实验中采用RF-310T-11400型号直流电机,同时配有光耦测速模块。通过检测输出脉冲来检测电机转速。
基于FPGA的直流电机/基于FPGA的直流电机
├── dc1
│ ├── db
│ │ ├── cmpr_kkg.tdf
│ │ ├── dc1.(0).cnf.cdb
│ │ ├── dc1.(0).cnf.hdb
│ │ ├── dc1.(1).cnf.cdb
│ │ ├── dc1.(1).cnf.hdb
│ │ ├── dc1.(10).cnf.cdb
│ │ ├── dc1.(10).cnf.hdb
│ │ ├── dc1.(11).cnf.cdb
│ │ ├── dc1.(11).cnf.hdb
│ │ ├── dc1.(12).cnf.cdb
│ │ ├── dc1.(12).cnf.hdb
│ │ ├── dc1.(2).cnf.cdb
│ │ ├── dc1.(2).cnf.hdb
│ │ ├── dc1.(3).cnf.cdb
│ │ ├── dc1.(3).cnf.hdb
│ │ ├── dc1.(4).cnf.cdb
│ │ ├── dc1.(4).cnf.hdb
│ │ ├── dc1.(5).cnf.cdb
│ │ ├── dc1.(5).cnf.hdb
│ │ ├── dc1.(6).cnf.cdb
│ │ ├── dc1.(6).cnf.hdb
│ │ ├── dc1.(7).cnf.cdb
│ │ ├── dc1.(7).cnf.hdb
│ │ ├── dc1.(8).cnf.cdb
│ │ ├── dc1.(8).cnf.hdb
│ │ ├── dc1.(9).cnf.cdb
│ │ ├── dc1.(9).cnf.hdb
│ │ ├── dc1.asm.qmsg
│ │ ├── dc1.asm_labs.ddb
│ │ ├── dc1.cbx.xml
│ │ ├── dc1.cmp.bpm
│ │ ├── dc1.cmp.cdb
│ │ ├── dc1.cmp.ecobp
│ │ ├── dc1.cmp.hdb
│ │ ├── dc1.cmp.logdb
│ │ ├── dc1.cmp.rdb
│ │ ├── dc1.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
│ │ ├── dc1.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
│ │ ├── dc1.db_info
│ │ ├── dc1.eco.cdb
│ │ ├── dc1.eds_overflow
│ │ ├── dc1.fit.qmsg
│ │ ├── dc1.fnsim.cdb
│ │ ├── dc1.fnsim.hdb
│ │ ├── dc1.fnsim.qmsg
│ │ ├── dc1.hier_info
│ │ ├── dc1.hif
│ │ ├── dc1.map.bpm
│ │ ├── dc1.map.cdb
│ │ ├── dc1.map.ecobp
│ │ ├── dc1.map.hdb
│ │ ├── dc1.map.logdb
│ │ ├── dc1.map.qmsg
│ │ ├── dc1.map_bb.cdb
│ │ ├── dc1.map_bb.hdb
│ │ ├── dc1.map_bb.hdbx
│ │ ├── dc1.map_bb.logdb
│ │ ├── dc1.pre_map.cdb
│ │ ├── dc1.pre_map.hdb
│ │ ├── dc1.psp
│ │ ├── dc1.root_partition.cmp.atm
│ │ ├── dc1.root_partition.cmp.dfp
│ │ ├── dc1.root_partition.cmp.hdbx
│ │ ├── dc1.root_partition.cmp.logdb
│ │ ├── dc1.root_partition.cmp.rcf
│ │ ├── dc1.root_partition.map.atm
│ │ ├── dc1.root_partition.map.hdbx
│ │ ├── dc1.root_partition.map.info
│ │ ├── dc1.rtlv.hdb
│ │ ├── dc1.rtlv_sg.cdb
│ │ ├── dc1.rtlv_sg_swap.cdb
│ │ ├── dc1.sgdiff.cdb
│ │ ├── dc1.sgdiff.hdb
│ │ ├── dc1.signalprobe.cdb
│ │ ├── dc1.sim.cvwf
│ │ ├── dc1.sim.hdb
│ │ ├── dc1.sim.qmsg
│ │ ├── dc1.sim.rdb
│ │ ├── dc1.simfam
│ │ ├── dc1.sld_design_entry.sci
│ │ ├── dc1.sld_design_entry_dsc.sci
│ │ ├── dc1.sta.qmsg
│ │ ├── dc1.sta.rdb
│ │ ├── dc1.sta_cmp.8_slow_1200mv_85c.tdb
│ │ ├── dc1.syn_hier_info
│ │ ├── dc1.tis_db_list.ddb
│ │ ├── dc1.tiscmp.fast_1200mv_0c.ddb
│ │ ├── dc1.tiscmp.fastest_slow_1200mv_0c.ddb
│ │ ├── dc1.tiscmp.fastest_slow_1200mv_85c.ddb
│ │ ├── dc1.tiscmp.slow_1200mv_0c.ddb
│ │ ├── dc1.tiscmp.slow_1200mv_85c.ddb
│ │ ├── dc1.tmw_info
│ │ ├── logic_util_heursitic.dat
│ │ ├── mux_96e.tdf
│ │ ├── mux_cqc.tdf
│ │ ├── mux_m6d.tdf
│ │ ├── mux_src.tdf
│ │ ├── prev_cmp_dc1.asm.qmsg
│ │ ├── prev_cmp_dc1.fit.qmsg
│ │ ├── prev_cmp_dc1.map.qmsg
│ │ ├── prev_cmp_dc1.qmsg
│ │ ├── prev_cmp_dc1.sim.qmsg
│ │ ├── prev_cmp_dc1.sta.qmsg
│ │ └── wed.wsf
│ ├── dc1.asm.rpt
│ ├── dc1.bdf
│ ├── dc1.done
│ ├── dc1.fit.rpt
│ ├── dc1.fit.smsg
│ ├── dc1.fit.summary
│ ├── dc1.flow.rpt
│ ├── dc1.map.rpt
│ ├── dc1.map.summary
│ ├── dc1.pin
│ ├── dc1.qpf
│ ├── dc1.qsf
│ ├── dc1.qws
│ ├── dc1.sim.rpt
│ ├── dc1.sof
│ ├── dc1.sta.rpt
│ ├── dc1.sta.summary
│ ├── dc1.vwf
│ ├── dcmotor1.bsf
│ ├── dcmotor1.vhd
│ ├── dcmotor2.vhd
│ ├── dcmotor3.vhd
│ ├── dcmotor4.vhd
│ ├── dcmotor4.vhd.bak
│ ├── incremental_db
│ │ ├── README
│ │ └── compiled_partitions
│ │ ├── dc1.root_partition.cmp.cdb
│ │ ├── dc1.root_partition.cmp.dfp
│ │ ├── dc1.root_partition.cmp.hdb
│ │ ├── dc1.root_partition.cmp.kpt
│ │ ├── dc1.root_partition.cmp.logdb
│ │ ├── dc1.root_partition.cmp.rcfdb
│ │ ├── dc1.root_partition.cmp.re.rcfdb
│ │ ├── dc1.root_partition.map.cdb
│ │ ├── dc1.root_partition.map.dpi
│ │ ├── dc1.root_partition.map.hdb
│ │ └── dc1.root_partition.map.kpt
│ ├── key_check.vhd
│ ├── key_check.vhd.bak
│ ├── mux1.vhd
│ ├── rate.vhd
│ └── xianshi.vhd
└── 新建 Microsoft Word 文档.docx
4 directories, 146 files
- 2021-08-17 00:31:15下载
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