BoW_code

（1）熟悉并掌握傅立叶变换 （2）了解傅立叶变换在图像处理中的应用 （3）通过实验了解二维频谱的分布特点 （4）用MATLAB实现傅立叶变换仿真 ((1) be familiar with and master the Fourier transform (2) understand the Fourier transform in image processing applications (3) experiments to understand the characteristics of the two-dimensional distribution of the spectrum (4) simulation using MATLAB Fourier transform)

说明：  对脑肿瘤进行分割 基于3dunet(Brain tumors were segmented based on 3dunet)

说明：  随机抽样一致算法RANSAC，在图像配准中可以用于去除不精确的匹配点。(Random sample consensus algorithm RANSAC, in the image registration can be used to remove inaccurate matching point.)

改进分水岭算法，详细注解标在m文件内了，希望对大家有用(Improved watershed algorithm and hope for all of us)

利用matlab程序编写的图像分割代码，计算分割后的区域邻接图(Using the image segmentation code written by the matlab program to calculate the neighborhood graph after the segmentation)

实现EEMD算法的函数，如extrema.m，eemd.m等等(the functions actualize of EEMD algorithm,such as extrema.m,eemd.m)

OFDM调制的的AWGN加瑞丽衰落信道,其它的我就不多说了(OFDM modulation of AWGN and ruili fading channel, the other I will not say)

说明：  该设计使用8个AXI视频直接存储器访问（AXI VDMA）引擎同时移动16个流（8个传输视频流和8个接收视频流），每个流以1920 x 1080像素格式以60赫兹刷新率移动，每个像素24个数据位。此设计还具有额外的视频等效AXI流量，该流量由为1080p视频模式配置的四个LogiCORE AXI流量发生器（ATG）核心生成。ATG核心根据其配置生成连续的AXI流量。在本设计中，ATG被配置成以1080p模式生成AXI4视频流量。这使得系统吞吐量需求达到DDR的80%左右带宽。每个AXI VDMA由LogiCORE IP测试模式生成器（AXI TPG）核心驱动。AXI VDMA配置为在自由运行模式下运行。每个AXI VDMA读取的数据被发送到能够将多个视频流多路复用或叠加到单个输出视频流的通用视频屏幕显示（AXI OSD）核心。AXI OSD核心的输出驱动板载高清媒体接口（HDMI技术）视频显示接口通过RGB到YCrCb颜色空间转换器核心和逻辑核心IP色度重采集器核心。LogiCore视频定时控制器（AXI VTC）生成所需的定时信号。(The design uses eight AXI video direct memory access (AXI VDMA) engines to simultaneously move 16 streams (eight transmit video streams and eight receive video streams), each in 1920 x 1080 pixel format at 60 Hz refresh rate, and 24 data bits per pixel. This design also has additional video equivalent AXI traffic generated from four LogiCORE AXI Traffic Generator(ATG) cores configured for 1080p video mode. The ATG core generates continuous AXI traffic based on its configuration. In this design, ATG is configured to generate AXI4 video traffic in 1080p mode. This pushes the system throughput requirement to approximately 80% of DDR bandwidth. Each AXI VDMA is driven from a LogiCORE IP Test Pattern Generator (AXI TPG)core. AXI VDMA is configured to operate in free running mode. Data read by each AXI VDMA is sent to a common Video On-Screen Display (AXI OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream.)

说明：  基于DSP和FPGA芯片的实时图像处理系统。该系统不同于传统基于PC机模式的图像处理系统，发挥了DSP和FPGA两者的优势，能更好地提高图像处理系统实时性能，同时也最 大可能地降低成本。(Real time image processing system based on DSP and FPGA. This system is different from the traditional image processing system based on PC mode. It can improve the real-time performance of the image processing system better by using the advantages of DSP and FPGAIt is possible to reduce costs.)

We extend the well-known Shi-Tomasi-Kanade tracker by introducing an automatic scheme for rejecting spurious features. We employ a simple and efficient outlier rejection rule, called X84. Experiments with real and synthetic images confirm that our algorithm makes good features to track better