T_fload_1_2

这是一个介绍可见光通信OFDM的ppt 介绍了LED白光可见光通信的优点及发张潜力，并结合OFDM技术对可见光通信做了深入的说明。(This is an introduction of visible light communication ppt describes the advantages of OFDM white LED visible light communication and sent Zhang potential, combined with OFDM technology for visible light communication done a thorough explanation.)

说明：  基于VC++的51单片机实现LED灯闪烁源码(51 single-chip microcomputer based on VC ++ to realize the source code of LED flashing)

说明：  有关STM32F103单片机使用PAC968516路pwm输出模块的驱动程序(About STM32F103 MCU using PAC968516 PWM output module driver)

c语言开发单片机 控制跑马灯的亮度的变化 按键控制亮度增减(C develop SCM Control the brightness of the scrolling the change of control buttons increase or decrease brightness)

bs83b08a-3 eeprom 读写(bs83b08a-3 eeprom reader)

说明：  MST703烧录工具，有需要的朋友可以下载(MST703 burning tool, friends in need can download)

用430F149控制AD9851的程序 。(AD9851 with 430F149 control procedures.)

说明：  用数码管显示电压，发送到串口，然后有高低电压报警，只有部分代码(Display voltage with digital tube, send it to serial port, then alarm with high and low voltage, only part of the code)

说明：  使用于ＡＶＲ单片机的几种Ｃ语言，大家可以参考一下，以便以后在ＡＶＲ的程序编写中提高自己(used in the AVR several C language, we can make reference to the AVR after the procedure to improve their writing)

stm32f4 adc 的代码，双通道，用DMA保存数据。(stm32f4 family c code, adc This example provides a short description of how to use the ADC peripheral to convert a regular channel in Dual interleaved mode using DMA in mode 3 with 5Msps. DMA mode 3 is used in interleaved mode in 6-bit and 8-bit resolutions. The Dual interleaved delay is configured 6 ADC clk cycles. On each DMA request (two data items are available) two bytes representing two ADC-converted data items are transferred as a half word. The data transfer order is similar to that of the DMA mode 2. A DMA request is generated each time 2 data items are available 1st request: ADC_CDR[15:0] = (ADC2_DR[7:0] << 8) | ADC1_DR[7:0] 2nd request: ADC_CDR[15:0] = (ADC2_DR[7:0] << 8) | ADC1_DR[7:0] The ADC1 and ADC2 are configured to convert ADC Channel 12, with conversion triggered by software. By this way, ADC channel 12 is converted each 6 cycles. In this example, the system clock is 168MHz, APB2 =84MHz and ADC clock = APB2 /2. Since ADCCLK=)