RFC930

IEC103规约应用的知识要点文档，对学习iec103协议的人帮助很大(IEC103 application of the knowledge elements of the Statute of the document, to learn iec103 agreements were of great help to)

Asynchronous Transfer Mode (ATM) is a connection-oriented, packet-switched technology. The packets that are switched in an ATM network are of a fixed length, 53 bytes, and are called cells. The cell size has a particular effect on carrying voice traffic effectively. The ATM Adaptation Layer (AAL) sits between ATM and the variable-length packet protocols that might use ATM, such as IP.

介绍bch的基础知识，包括纠删码的编码和解码(Introduce the basic knowledge of bch, including the encoding and decoding of erasure codes)

VC++和 Matlab 的 混 合 编 程 具 有 很 大 的 实际意义。 文 讨 论 了如何 使 用 Matlab 的 Complier 将 *.m 函 数 编 译 为 动 态 链 接 库 DLL， 提 供 给 VC++调 用 的 方 法，提 供 了 一 种 VC++与 Matlab 混合编程的 快 速 实 现 。(The mixed programming of VC++ and Matlab has great practical significance. This paper discusses how to use COMplier of MATLAB to compile *. m function into DLL of dynamic link library and provide a method for calling VC++. It also provides a fast realization of mixed programming between VC++ and MATLAB.)

ethernet mac vhdl verilog basic

Blimpduino is a very low cost open source autonomous blimp. It consists of an Arduino-based blimp controller board with on-board infrared and ultrasonic sensors and an interface for an optional RC mode, a simple gondola with two vectoring (tilting) differential thrusters, and ground-based infrared beacon. It will be available as a commercial kit, complete with a mylar envelope, in late 2008.

本文研究了SMBus 规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下 (Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台 完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有 良好的性能。(This paper studies the SMBus specification, based on the introduction of the typical system-on-chip (SoC) intellectual property core design (IP) implementation, using top-down (Top-down) of the integrated circuit design methods achieve a design and architecture based on the total Line functional model (BFM) achieve functional verification platform for simulation, successfully completed a logic synthesis and timing simulation. FPGA silicon validation and post-tests show that the design has good performance.)

说明：  振铃芯片KA2410数据手册(Ringing chip KA2410 Data Sheet)

说明：  High Definition Multimedia Specification Version 2.0

PT2262 PT2272 315M/433M 无线编码芯片中文资料，简单易用(The PT2262 PT2272315 Ms/433 M lead-in codes the chip Chinese data, simple easy use)