8085汇编实现计算器

vhdl 键盘程序，对键盘输入的字符进行判断，写入fpga中-VHDL key

检测上升沿的verilog程序，有验证程序，可用synplify验证-Detection of rising edge of the Verilog procedures, there is the verification process can be used to verify Synplify

利用FPGA来采集美新加速度计的数据，并将FPGA采集到的数据传给ARM系统处理-The use of FPGA to collect the new U.S. accelerometer data and the data collected FPGA passed ARM system processing

说明：  彩条产生程序。。。。720p需添加74.25M时钟(colorbar generation. need 74.25mhz clock if 720p gen)

说明：  试用Verilog HDL语言，设计十进制计数器，将计数过程用一个数码管进行显示（0～9）。要求首先使用Modelsim软件进行功能仿真，然后使用Quartus软件综合，并下载到开发板进行电路功能测试。(Using Verilog HDL language, a decimal counter is designed. The counting process is displayed by a digital tube (0 ~ 9). It is required to first use Modelsim software for functional simulation, then use quartus software for synthesis, and download to the development board for circuit functional test.)

source vhdl code of D flipflop logic

Traffice LED Controller base on FSM 1. for crossroad, each road with 3 led: green, red, yellow. 2. only use one counter.

用Verilog语言实现QPSK调制，QPSK是一种数字调制方式。它分为绝对相移和相对相移两种。 (Verilog language using QPSK modulation, QPSK is a digital modulation. It is divided into absolute and relative phase shift of the phase shift of two.)

LAB 9, Excercise for DE2 Altera

spi通用串行总线，4线控制，可读写操作(SPI universal serial bus, 4-wire control, readable and writable operation)