简易数字频率计

32-bit shifter, shifter, 32-bit.Very goog as a study file.

verilog触发器，属于数字电子技术实验入门的资料。

在quartusII环境下采用对编解码芯片HD6408和HD6409驱动的方式实现曼彻斯特编解码(Environment in quartusII codec chip used on the HD6408 and HD6409-driven way to achieve encoding and decoding of Manchester)

用Verilog编写的以太网控制器，可以使用，里面是全部verilog源码(Ethernet controller based on Verilog, can be used directly, all verilog files)

利用FPGA内核产生SPWM波，并且频率可调(The FPGA kernel is used to generate SPWM waves, and the frequency is adjustable)

可以实现2PSK的信号调制，已经过Modelsim波形仿真(It can realize 2PSK signal modulation and has been simulated by Modelsim waveform.)

bch编解码的完整版，本人已经做过fpga实现，就是按照该程序为原型，绝对可运行(bch decoding the full version, I have done fpga implementation is in accordance with the procedure for the prototype, can certainly run)

采用倍频及1/3、1/12倍频绘制的路面不平度频谱图（自编）(Using octave and 1/3, 1/12 octave drawn road roughness spectrum (self))

Verilog控制lcd1206显示源程序(Verilog control lcd1206 display source program)

hdlc协议的相关程序，用verilog语言编写，供大家交流学习(hdlc protocol procedures using Verilog language for the exchange of learning)