10进制的FPGA数字计数器

测温，数码管显示，基于FPGA 的verilog程序，基于DS18B20(Temperature measurement)

access must be conf urr arr

实现QR_RLS算法,基于fpga 的非线性功放的dpd实现(realize QR_RLS)

VHDL黄金参考手册，能让你更好的学习了解VHDL语言(VHDL gold reference manual, can make you a better learn VHDL language)

通过摄像头图像的提取，在FPGA开发板上实现的，主要实现了图像轮廓的提取(Extraction of the image through the camera, in the FPGA implementation of the development board, the main achievement of the image contour extraction)

verilog实现DLX指令集5段流水线(5 stage DLX pipeline implemented in verilog)

通过调用三速以太网IP核，上层实现ARP,TCP,UDP协议，以太网芯片是88E1111，绝对可用，支持千兆以太网，GMII接口。

hdmi 视频编解码输入输出模块，verilog实现(hdmi encoder and decoder in verilog.)

编程规范是重中之重，带你书写良好的变成习惯(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)

基于fpga状态机的交通灯设计，亮灯时间自己修改，程序简单易懂。(Traffic light design based on FPGA state machine, light time self-modifying, the program is simple and easy to understand.)