用VHDL和verilog实现的四人抢答器

基于FPGA cyclone III EP3C16F484C6的俄罗斯方块游戏。实现双人进行，屏幕倒置，分数显示，vga接口，键盘接口等功能(Tetris game based on FPGA cyclone III EP3C16F484C6 with functions including double players, screen upside down, score, vga and keyboard interface.)

说明：  多路信号复用基带系统的建模与设计,按位同步复接并掌握四路同步复接器的VHDL设计及系统的时序仿真。(library ieee use ieee.std_logic_1164.all use ieee.std_logic_unsigned.all )

该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序，FPGA上的VERILOG通信程序。(The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, including PC, the USB firmware, drivers, FPGA' s Communication Program)

本程序是fpga控制flash的读写程序，包括了程序和仿真时的测试文件(fpga flash)

FPGA做机器人舵机控制系统，verilog(FPGA to do the robot servo control system, verilog)

DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。-Verilog source code for DDR SDRAM controler design,including guide book in chinese.

计算机中每一条机器指令的执行，都离不开程序计数器的正确执行，本程序实现程序计数器。(Computer implementation of each machine instruction, are inseparable from the correct implementation of the program counter, this program achieve the program counter.)

FPGA，用VHDL语言产生可调的PWM波(FPGA, VHDL language adjustable PWM wave)

说明：  there's a clock divider for DE2 altra board clock (50MHz)

Electronic and system matlab simulation