Nexys 4 7 段显示器

在Xilinx开发环境ISE13.2上用MIG产生的DDR3 SDRAM控制器，里面生成了Core，可用于DDR3读写控制(On the Xilinx development environment ISE13.2 generated with MIG DDR3 SDRAM controller, which generates the Core, DDR3 can be used to read and write control)

说明：  FPGA做波形发生器，产生8种波形，包括三角波，正弦波，锯齿波，方波等。(FPGA is used as waveform generator,Generate 8 waveforms, including triangle, sine, sawtooth, square, etc.)

32位单周期校验码

fpga debounce filter code in vhdl

说明：  FPGA应用状态机版，适合初学者学习状态机三段式，ASMD图的理解和翻译，以及Verilog语言的应用 最后对仿真的一些理解 其中包含HDL设计及testbench描述 根据要求设计了一个能求出一个32bit字中两个相邻0之间最大间隙的电路。(FPGA application state machine version, suitable for beginners to learn state machine three-stage, ASMD chart understanding and translation, and Verilog language application. Finally, some understanding of simulation, including HDL design and testbench description According to the requirements, a circuit is designed to find the maximum gap between two adjacent zeros in a 32 bit word.)

锁相环是通信领域最基本的元件，同时在FPGA上也有广泛的应用，本代码是锁相环PLL的Verilog HDL代码，简单易读，能够实现PLL基本的锁相、分频等功能

samsung K9 nandflash控制器，有设计源码和设计文档

说明：  将BT656数据流转换成RGB图像格式的数据(Converting BT656 data stream into RGB image format)

Xilinx user constraints file for the cpld xc9536 or xc9536xl or xc9572 or xc9572xl

vhdl code for programming