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用Verilog做的SD卡控制器(有详细的注释)
SDIO 接口,实现SD卡的控制器功能,带有详细的注释(SDIO Interface,to realize the controller of SD Card,and have detail description.)
- 2020-06-16 22:00:01下载
- 积分:1
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FPGA串口调试程序
用xilinx ISE软件实现串口调试的程序其中,包含FIFO的一个IP核用于缓存数据
- 2022-03-10 12:40:48下载
- 积分:1
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forwarding
浙江大学体系结构实验课代码,5级流水线实现旁路和停顿(5-stage pipeline to achieve realization of the bypass pipeline bypass pause 5 pause)
- 2020-09-26 12:07:46下载
- 积分:1
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nv04_context
The description header can be found in signal_processing_library.h.
- 2015-07-17 09:36:41下载
- 积分:1
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通用RS编码
RS通用编码器,根据定义的参数以及本原多项式就能实现各种体制的编码,Verilog实现,还附带有限域乘法的实现,代码清晰,精炼
- 2022-08-15 10:45:57下载
- 积分:1
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试验台的 cavlc entrope 解码器
描述
- 2022-01-23 10:08:11下载
- 积分:1
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mimasuo
6位密码锁,密码锁控制器是硬件与软件的结合。根据设计要求,决定以FPGA芯片和VHDL语言设计此电子密码锁(6 locks, the lock controller is a combination of hardware and software. According to design requirements, the decision to the FPGA chip and VHDL design electronic locks)
- 2012-05-22 21:11:17下载
- 积分:1
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遥控器接收解码电路
设计遥控器接收解码电路。该电路接收编码后的串行数据,解码输出数据。电路接收
到的串行数据的格式为: 4 位同步码“ 1010”, 4 位数据(高位在前), 1 位奇校验码(对前 8 位数据校验)(Design of remote control receiver decoding circuit. The circuit receives the encoded serial data and decodes the output data. The format of the serial data received by the circuit is: 4 bit synchronous code "1010", 4 bit data (high in the front), 1 bit parity check code (check for the first 8 bits of data))
- 2017-11-27 15:10:34下载
- 积分:1
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Bayer2RGB
Bayer 转RGB Verilog代码实现。。5*5 窗口。在工程中应用的(Bayer to RGB Verilog code implementation. 5*5 window. Applied in Engineering)
- 2020-12-14 15:29:15下载
- 积分:1
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shizhong
VHDL写时钟,分频模块什么,实现计时。定点报时,定点闹钟,显示年月日。(verilog HDL)
- 2014-01-09 18:29:40下载
- 积分:1