阿喜大师验证环境系统verilof

stm32与fpga之间的通信，协议是SPI的，可双向通信（双向通信需要自己例化，只例化了fpga到stm32）(Communication between STM32 and FPGA, the protocol is SPI, two-way communication (two-way communication needs to be taken as an example, only FPGA to STM32))

four bit counter verlog source code for veriwell including test bench

zedboard partial reconfiguration tutorial

UML2 apprendre a modeliser a l aide de UML

这个是 DDR3 SDRAM 控制器的 verilog 代码。欢迎下载和使用。谢谢您的支持！！！

基于FPGA的2FSK调制解调，里面有详细的工程说明，对于学习ISE软件和通信原理的知识很有帮助(FPGA based 2FSK modulation and demodulation, which contains detailed engineering instructions, for learning ISE software and communication principles of knowledge is very helpful.)

浮点加法器的用Verilog实现，32位的浮点加法器(Floating point adder Verilog)

说明：  libero soc工程，实现通过串口接收到单字节数据后并返回发送给上位机(Libero SOC project, which realizes receiving single byte data through serial port and sending it back to host computer)

这个程序是verilog代码，可以综合，同时带有testbench测试程序，可以用modelsim仿真实现。基于2的8点fft运算，分模块设计，比较简单，同时利于初学者学习。

用verilog写的简单的CPU，有详细注释(Use verilog to write a simple CPU, with detailed notes)