VHDL of many examples, including the LED, lcd, keypad, digital control and so on...

verilog xilinx IP实现FFT仿真(Verilog xilinx IP implementation FFT simulation)

示波器的源码,基于串行口的,(oscilloscope source code, based on the serial port,)

基于verilog的2FSK调制程序，simulink仿真通过(2FSK modulation program based on Verilog, Simulink simulation passed)

PLL是数字锁相环设计源程序, 其中, Fi是输入频率(接收数据), Fo(Q5)是本地输出频率. 目的是从输入数据中提取时钟信号(Q5), 其频率与数据速率一致, 时钟上升沿锁定在数据的上升和下降沿上；顶层文件是PLL.GDF-digital phase-locked loop PLL design source, in which Fi is the input frequency (receive data), Fo (Q5) is the local output frequency. Objective is to extract data input clock signal (Q5), its frequency and data rate line, the clock rising edge of the lock data the rising and falling edge; top-level document is PLL.GDF

verilog实际例子，非常适合初学者学习(verilog practical examples, very suitable for beginners to learn)

8251的完整的功能的实现,可以进行编译,综合.-8251 complete function of the realization can be compiled and integrated.

基于FPGA控制的DDS波形发生器，可在Cyclone IV系列板子上使用，已经过仿真验证(Based FPGA control DDS waveform generator in Cyclone IV series board on use, has been simulation)

adder 18b trong chuong trinh verilog

BT656转RGB的算法实现代码，使用VORILOG语言编写(BT656-->RGB, verilog)

this files in Quartus2 are fulladder