VHDL of many examples, including the LED, lcd, keypad, digital control and so on...

说明：  verilog开发的经典教材，详细介绍了语法，常见历程，以及通用的程序段(verilog development of the classic materials, detailed information on syntax, common history, as well as the common program segment)

verilog代码，串口发送接收代码，含有源代码和测试文件，准确可用(verilog code for serial port transmit and receive code, with source code and test files, and accurate available)

以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))

基于FPGA的图像采集卡的设计与相关说明-FPGA-based design of frame grabbers and related note

对于中断技术有非常详细的讲解，带图片完整版(Technology for the interruption of a very detailed explanation, with pictures full version)

自己编写的，浮点数与整数之间的转换的Verilog HDL实现(Written by myself, it is converted into Verilog HDL integer floating point implementation)

载波同步，costas环，基于Verilog的载波同步环(Carrier synchronization, costas ring, based on Verilog carrier synchronization ring )

FPGA的卷积编码小程序，VHDL描述，参数为2，1，7.(2,1,7 cov with VHDL.)

说明：  一个简单的千兆以太网UDP协议的实现,可以实现数据的收发和ARP，实现PC端与FPGA的以太网通信(A simple implementation of Gigabit Ethernet UDP protocol can realize data sending and receiving and ARP, and realize Ethernet communication between PC and FPGA.)

说明：  Viterbi译码,IS-95中的1/2码率的卷积码(Viterbi decoding, IS-95 of 1/2 the rate Convolutional Codes)