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adda
基于FPGA 黑金ALINX 515的 ADDA采样模块源码(需调试)(ADDA Sampling Module Source Code Based on FPGA Heijin ALINX 515)
- 2020-06-20 13:00:01下载
- 积分:1
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ex11
说明: 该模块实现了FPGA的uart串口收发功能(The module realizes UART serial port transceiver function of FPGA)
- 2020-09-09 11:58:09下载
- 积分:1
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Carry look ahead adder with saturating arithmetic
用Verilog实现的16位进位先行加法器。实现了饱和算法。
- 2023-01-16 01:15:03下载
- 积分:1
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GMSK
说明: 高斯最小频移键控(Gaussian Filtered Minimum Shift Keying),这是GSM系统采用的调制方式。数字调制解调技术是数字蜂窝移动通信系统空中接口的重要组成部分。GMSK调制是在MSK(最小频移键控)调制器之前插入高斯低通预调制滤波器这样一种调制方式。GMSK提高了数字移动通信的频谱利用率和通信质量。(Gauss Filtered Minimum Shift Keying is a modulation method used in GSM system. Digital modem technology is an important part of air interface of digital cellular mobile communication system. GMSK modulation is a method of inserting a Gaussian low-pass pre-modulation filter before the MSK (minimum frequency shift keying) modulator. GMSK improves the spectrum utilization and communication quality of digital mobile communication.)
- 2019-06-14 09:18:30下载
- 积分:1
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vendingmachine
vendingmachine vhdl code
- 2011-12-03 20:53:39下载
- 积分:1
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PerryVHDL
VHDL Bible. It is a must read for any front end vlsi designer.
- 2009-03-07 13:17:14下载
- 积分:1
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ppmencoder
一个八位的并行输入,串行输出的编码器;带有开头结尾帧。(It is an encode with eight palallel input and a serial output.)
- 2020-11-23 01:19:34下载
- 积分:1
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sqrt_pipeline
说明: Matlab - to hdl code for square root
- 2020-06-17 12:20:02下载
- 积分:1
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VHDL语言,设计一个在DE2平台的8个七段数码管上循环显示HELLO的程序
VHDL语言,设计一个在DE2平台的8个七段数码管上循环显示HELL0的程序,采用按键控制循环的速度,慢速循环时间间隔为1S,快速循环时间间隔为200ms。(VHDL language, design a platform in the DE2 8 segment digital tube display HELL0 program cycle, the speed control loop using keys, slow cycle time interval for the 1S, fast cycle time interval is 200ms.)
- 2020-07-08 20:28:56下载
- 积分:1
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ClockSync
基于COMTEX-M3的IEEE1588,irigB对时的源程序,包括GPS对时程序,并将对时的结果写入FPGA中(Based COMTEX-M3 of IEEE1588, irigB on time source, including GPS for the program, and writes the results when the FPGA)
- 2015-05-12 15:11:03下载
- 积分:1