三菱PLC编程软件(GPPW)的使用手册,详细介绍GPPW的使用方法.

使用89S52设计的电子钟，C51 编写，本例没有使用1302等时钟芯片，但本例完全具有时钟芯片的功能。比如基本的年月日，时分秒和星期功能，而且还有平闰年的天数自动补偿。由于采用的是全软件算法，时钟误差较大，采用高质量晶振可以减少误差。本例重在培养与训练初学者对C51的学习。-89S52 designed using an electronic clock, C51 preparation, in this case did not use 1302 clock chip, etc., but in this case complete with a clock chip functions. For example the basic date, time, and every second week of features, but also the number of days flat leap automatic compensation. As a result of the full software algorithms, the clock error of greater use of high-quality crystal can reduce the error. In this case focuses on training and training for beginners to learn on the C51.

ECOS开发增值包-Ecos development of value-added package

基于LPC2148的UCOSII移植，带6个任务-UCOSII transplantation based on the LPC2148, with six mission

该数控直流电流源以精密压控电流源为核心、用单片机、DAC组成控制电路，引入“S类”反馈控制功率放大电路，实现超精密电流控制、具备精准的扩流能力、低失调、有步进、同时带有 丰富扩展功能的精密电流源。经过ADC采样，完成输出电流显示功能，并使输出范围覆盖0～2A，是理想的电流源解决方案。-The CNC precision DC voltage-controlled current source to current source at the core, with single-chip, DAC control circuit components, the introduction of " S-type" feedback control circuit power amplifier to achieve ultra-precision current control, with precise flow capacity expansion, low disorder, there is stepping at the same time and expanded with rich precision current source. ADC sampling after completion of output current display, and output cover 0 ~ 2A, the current source is an ideal solution.

液晶GXM12232的间接访问源码。仅供参考。-LCD GXM12232 visit the indirect source. For reference purposes only.

this a book about cpld fpga developmen,it is very useful for eda development

基于FPGA的verilog键盘扫描程序，-FPGA-based verilog keyboard scanner,

用单片机控制键盘的程序,利用中断获得键盘扫描码并转换为ASCII码，在1602液晶上显示字符。C语言编写，KEIL环境下编译，键盘驱动写得相当好。-Single-chip microcomputer to control the keyboard with the procedure, the use of interrupted access to the keyboard scan code and converted to ASCII code, in the 1602 character LCD display. C language, KEIL compiler environment, keyboard-driven written a very good job.

IEEE Std 1364.1-2002 IEEE Std. 1364.1 - 2002 IEEE Standard for Verilog Register Transfer Level Synthesis.rar-IEEE Std 1364.1-2002 IEEE Std. 1364.1- 2002 IEEE Standard for Verilog Register Transfer Level Synthesis.rar

QT电子书的代码 这个是我以前下载的 忘记在哪了 这只是一个小小的电子书 里面加了一些东西 比如颜色之类的