VHDL的重要PPT资料,对初学者非常有益处

这是1C6开发板上元件的具体资料。此开发板有掉电不丢失程序的功能，就是靠着几个芯片(development board components specific information. This development board is not lost restart procedures, it was relying on a few chips)

ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)

FPGA代码，包含地址译码模块、16位锁存器、AD片选、死区及滤除窄脉冲、过流和短路保护、解除脉冲封锁模块、PWM模块、PWM选择 (FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection)

tdma参数化模块。可以自动生成2的n次的tdma哥时隙，用户可根据需要自己配置参数(tdma see the number of model lumps. 2 n basis following manner tdma chance possible 以自 dynamic generation, for root needed self-placement see number)

FIR滤波器：自定滤波器的类型（低通，高通或带通）、设计指标（通带截止频率、通带波纹、阻带截止频率、阻带衰减） 1、根据指标选择合适的窗函数，用窗口设计法设计符合指标的FIR滤波器；并验证其性能是否满足预定指标。 (FIR filters: Custom filter types (low pass, high pass or band-pass), design specifications (passband cutoff frequency, passband ripple, stopband cutoff frequency, stopband attenuation) 1, according to indicators choose the right window function, using the window design method of FIR filter designed to meet the targets and verify that its performance meets the set targets.)

实现BCD码的加法，用VHDL实现，是书籍上配套的-BCD ADDER，Using VHDL

这里描述的VHDL源代码由若干模块下的释放

spi通用串行总线，4线控制，可读写操作(SPI universal serial bus, 4-wire control, readable and writable operation)

Fixed-point base-2 logarithm (DW_log2) // Computes the base-2 logarithm of a fixed point value in the // range [1,2).

说明：  有关risc-v cpu的问题,里面有一些有关cpu的设计(The problem of risc-v can be solved)