用VHDL语言编写的一个控制程序，主要功能是输入码同步，输出字和帧信号...

用Verilog语言实现汉明编码，很粗燥，是大三的时候做的(With the Verilog language Hamming code, it is rough dry, a junior at the time to do)

串口程序 VHDL-Serial procedures VHDL

任意数据发生器的源代码-arbitrary data source code generator

verilog 编写的ldpc编码，含有两个文件(LDPC written by Verilog)

一个游戏程序vhdl源码，供大家参考，希望有兴趣的人下载-VHDL source code of a game program for your information, I hope those who are interested in downloading

说明：  bnn-fpga是FPGA上CIFAR-10的二进制神经网络（BNN）加速器的开源实现。 加速器针对低功耗嵌入式现场可编程SoC，并在Zedboard上进行了测试。 在编写CIFAR-10测试集中的10000张图像时，错误率是11.19％。(bnn-fpga is an open-source implementation of a binarized neural network (BNN) accelerator for CIFAR-10 on FPGA. The architecture and training of the BNN is proposed by Courbarieaux et al. and open-source Python code is available. Our accelerator targets low-power embedded field-programmable SoCs and was tested on a Zedboard. At time of writing the error rate on the 10000 images in the CIFAR-10 test set is 11.19%.)

说明：  Multiplexer 4 to 1 on Modelsim

Turbo码编解码的FPGA实现，verilog语言编写(Implementation ofTurbo code on FPGA , using Verilog language)

Design HDL code for a circuit that calculates the Hamming distance of two 8-bit inputs.

VGA显示原理与VGA时序实现论文,详细介绍了VGA的原理 (Principle and VGA VGA display timing to achieve paper, detailing the principles VGA)