实现流水线的2D-DCT的MPEG压缩

说明：  用VHDL语言设计一个校验器，用for loop实现8位数据的偶校验，(With a for loop to achieve 8-bit data parity)

电路建模在总和 2 的 4 位十六进制的数字，将结果转换为十进制数和显示上 7 分割数据的语言。

VHDL库，仿真时使用的，包括打印，类型转换等实用的操作(Practical operation VHDL library, using simulation, including print, type conversion, etc.)

这是一个二进制的最简单分频器，是一个简短的fpga代码，用verilog书写(This is the most simple of a binary frequency divider, the fpga is a short code, written in verilog)

adpcm .c程序代码，完整,通过编译仿真(ADPCM c program code, complete compiled simulation)

QP编程创始人所著的介绍QP编程思想的书，中文版。QP是用于嵌入式中状态机编程的开源软件。(QP programming book written by the founder of the introduction of QP programming ideas, and Chinese version. QP is open source software for embedded state machine programming.)

vhdl 的testbench编写教程，英文ppt以及源码工程(Write tutorials, as well as English ppt Source of engineering vhdl testbench)

在nios系统开发中的驱动i2c音频电路的代码,包括verilog代码,与相应的驱动代码(In the nios system development in the driver i2c code for the audio circuitry, including the verilog code, and the corresponding driver code)

使用FPGA控制AD9288，方便移植，可以拿来直接使用，适合新手学习(Use FPGA control AD9288, easy migration, can be used to directly use for novices to learn)

梁祝音乐verilog code --适用于QUATUS II 开发环境下，适合于verilog入门学员(the verilog code of liangzhu )