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breathingLED
stc12c5a60s2单片机做的两路呼吸灯,可以用ad和按键控制闪动频率(stc12c5a60s2 SCM done with the two breathing lights, you can use the ad and buttons to control the flashing frequency)
- 2013-05-10 15:33:18下载
- 积分:1
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zw222
ZardWars Files
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- 2014-03-20 01:43:16下载
- 积分:1
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fadd16
实验用16位全加器的VHDL代码,适合初学者学习,数电学习的好工具。
(Experiment with 16-bit full adder VHDL code for beginners to learn, a good tool to learn a few power.)
- 2010-05-11 20:37:34下载
- 积分:1
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Roy dsd
说明: basic verilog code on siso, piso, sipo
- 2020-06-25 18:40:01下载
- 积分:1
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FM_T
一个简单的FM调制模块,FM发射,用Verilog编写,基于Xilinx SPARTAN6 XC6LX9开发(A simple FM modulation modules for FM transmitter, using Verilog prepared, based on XILINX SPARTAN6 XC6LX9 Development)
- 2020-11-25 20:19:32下载
- 积分:1
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GPS基带处理的verilog代码
GPS软件接收机基带处理的verilog程序,通过解扩解调,同步等过程将中频数据转换为原始导航数据
- 2022-03-24 13:40:54下载
- 积分:1
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ozgul2013
说明: Digital pre-distortion (DPD) is an advanced digital
signal-processing technique that mitigates the effects of power
amplifier (PA) nonlinearity in wireless transmitters. DPD plays
a key role in providing efficient radio digital front-end (DFE)
solutions for 3G/4G basestations and beyond. Modern FPGAs
are a promising target platform for the implementation of flexible
wireless DFE solutions, including DPD.
- 2019-01-05 18:20:30下载
- 积分:1
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dazhuankuai
基于FPGA设计的经典打砖块小游戏。游戏简单易玩。(FPGA design based on the classic Arkanoid game. Game easy to play.)
- 2013-11-26 09:40:37下载
- 积分:1
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CPU_Project_board
CPU 5级流水线实现(加hazard处理与板级验证,板级验证带有按键消抖)(5-stage pipelined CPU (plus hazard dealing with board-level verification, board-level verification with key debounce))
- 2020-12-03 09:29:25下载
- 积分:1
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cf_interleaver2
interleaver即交织器,里面包含有C,VHDL,VRILOG HDL三种语言写的交织器, 包括各种各样的组合达六七十种,描写详尽,是一个难得的学习交织器的材料 -interleaver that interleaver, which contains C, VHDL, VRILOG HDL three languages to write the interleaver, including a variety of combinations to depend species, a detailed description, is a rare study of the materials are intertwined
- 2022-03-16 02:30:32下载
- 积分:1