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TS_CHANNEL_656
利用ITU656接口传输数据流的方法!已得到应用!(ITU656 interface transfer data streams using the method! Has been applied!)
- 2010-02-23 14:16:18下载
- 积分:1
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Simple ADC of signal and LED indication
这是一个VHDL项目,用于在VIRTEX-4 xc4vsx35 FPGA板中执行接收信号的14位ADC。
- 2022-01-24 15:38:32下载
- 积分:1
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ug848-VC707-getting-started-guide
vc707 board getting started guide
- 2018-06-14 05:52:39下载
- 积分:1
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encode
RS(255,223)编码器,已实际运用到产品中(RS (255,223) encoder has actually applied to products)
- 2021-05-13 00:30:02下载
- 积分:1
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DigitalClock
数字钟:实验中用到的小程序,用于万年历中的模块(Digital clock: a small program used in the experiment, the modules for calendar)
- 2013-05-26 09:25:23下载
- 积分:1
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SoC验证的方法和技巧
SOC Verfication Methodology and Techniques
- 2022-06-14 22:50:41下载
- 积分:1
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rs_encoder
RS编码器的fpga实现,有TESTBench(RS encoder to achieve the fpga, and TESTBench)
- 2009-06-24 11:37:04下载
- 积分:1
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DecimationFilterDesignforDDCandImplementingItwithF
本文介绍了在数字下变频(DDC) 中的抽取滤波器系统设计方法和具体实现方案。采用CIC 滤波器、HB
滤波器、FIR 滤波器三级级联的方式来降低采样率。通过实际验证,证明了设计的可行性(This article describes the digital down conversion (DDC) of the decimation filter system design methods and concrete realization of the program. Using CIC filter, HB filter, FIR filter cascade three-level approach to reduce the sampling rate. Through the actual authentication, to prove the feasibility of the design)
- 2008-04-14 11:02:00下载
- 积分:1
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SVPWM_FPGA_ContainSourceCode
广东工业大学硕士论文《SVPWM算法优化及其FPGA/CPLD实现》,在详细分析经典SVPWM算法基础上,提出一种优化算法,并在FPGA上实现。论文附录包含VHDL源码。(Guangdong University Thesis " SVPWM algorithm to optimize its FPGA/CPLD realization" in the detailed analysis of the classical SVPWM algorithm is proposed based on an optimization algorithm, and implemented on FPGA. Paper appendix contains VHDL source code.)
- 2013-12-30 16:00:11下载
- 积分:1
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基于EPM1270的PS2键盘鼠标驱动源码Verilog
基于EPM1270的PS2键盘鼠标驱动源码Verilog-Based on the EPM1270 the PS2 keyboard and mouse-driven Verilog source
- 2023-04-28 06:25:04下载
- 积分:1