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VHDL language is designed to be simple to use the CPU, the focus of the design o...
用VHDL语言设计简单的CPU,重点设计微操作代码,然后设计CPU各组成模块,最后根据设计的微操作设计微指令,验证设计的正确性。可基本实现加、减、乘、除、移位、循环等操作。-VHDL language is designed to be simple to use the CPU, the focus of the design of micro-operation code, and then design the components of CPU module designed the final design of the micro-operation microinstruction to verify the correctness of the design. Can achieve the basic add, subtract, multiply, divide, transfer, recycling and other operations.
- 2022-01-26 04:06:25下载
- 积分:1
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ADC_Data_Recv_Module
接收机测试输入信号,
生成正余弦波,采样率、频率、幅度、相位可调节
并将生成的数据进行输出
压缩包包括Verilog代码、testbench代码、word文档
matlab仿真代码(The receiver tests the input signal,
Generation of positive cosine wave, sampling rate, frequency, amplitude, phase can be adjusted
And output the generated data
The compressed package includes the Verilog code, the testbench code
Matlab simulation code)
- 2017-12-08 17:56:02下载
- 积分:1
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TCL2543
基于FPGA的TLC2543控制器,采用状态进行控制ADC进行转换(The TLC2543 controller based on FPGA, using state control of ADC conversion)
- 2020-11-18 15:59:39下载
- 积分:1
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FIR
本实验主要是在FPGA上实现FIR数字滤波器的功能,不仅有工程文件,还具有论文资料。(This experiment mainly realizes the function of FIR digital filter on FPGA, not only has the engineering document, but also has the thesis information.)
- 2020-10-05 11:27:38下载
- 积分:1
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dda
该程序描述了运用FPGA 实现DDA圆弧插补运算(FPGA DDA)
- 2020-11-29 13:09:28下载
- 积分:1
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直接序列扩频通信系统VHDL仿真
直接序列扩频通信系统:
包含:
信源、扰码、交织、直扩、BPSK调制、解调、相关、解交织、解扰 请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报
- 2022-03-23 18:07:56下载
- 积分:1
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测试74LS系列芯片功能是否正常
可测试74LS00,74LS01,74LS02,74LS03等等芯片的功能是否正常。
- 2022-07-16 01:45:40下载
- 积分:1
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VGA-VHDL-Design
本文件给出了基于VHDL语言的VGA图像显示程序及其工程问件。(This document is presented based on VHDL language VGA image display program and the project asked the pieces.)
- 2010-06-19 11:35:12下载
- 积分:1
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基于VHDL的I2C程序0003,很不错的论文及程序,,大家快下啊
基于VHDL的I2C程序0003,很不错的论文及程序,,大家快下啊-based on the I2C procedures VHDL 0003, a very good paper and procedures, we quickly under ah
- 2022-03-21 08:29:16下载
- 积分:1
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用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。...
用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。-VHDL hardware description language developed by miniUART Interface IP Core, Users can be embedded into their own FPGA module.
- 2022-10-05 02:20:03下载
- 积分:1