verilog例子很丰富，几个经典的,希望对初学者有所帮助

SAP-1硬件描述语言（使用Verilog语言）

说明：  Xilinx Vivado 2018 License File

verilog写的数字频率计的控制模块,对程序进行控制-written in Verilog digital frequency meter control module, the program control

FPGA按键加蜂鸣器实验： 加延时防抖+蜂鸣器(Experiments of keys and buzzers in FPGA)

FPGA的fifo与dsp的emif接口测试程序(EMIF interface test program for FIFO and DSP of FPGA)

实现在屏幕上显示绿色和红色相间的水平条纹。其中，vga_640x480模块将产生行同步信号hsyn和场同步信号 vsync; vga_stripes模块将产生red、green和blue三个输出。(The horizontal stripes of green and red are displayed on the screen. Among them, vga_640x480 module will produce line synchronization signal Hsyn and field synchronization signal vsync; vga_stripes module will produce red, green and blue three outputs.)

使用信号功率计算，检测信号是否到达。从而控制后续模块，以减小系统功耗。(Signal power calculation, the detection signal to reach. To control follow-up modules to reduce system power consumption.)

频率计 测量范围1-100MHz 测量阈值0.1s 计数部分为FPGA/CPLD 语言VHDL 显示部分为51 单片机加八位数码管 语言C(Frequency meter Measuring range 1-100 MHZ Measure threshold is 0.1 s Count part of FPGA/CPLD Language VHDL Display part of 51 MCU with eight digital tube Language C)

简易数字存储示波器verilog源代码 经过EP2C8Q208C8验证(Simple digital storage oscilloscope verilog source code has been verified EP2C8Q208C8)

verilog写的LnE算法，可用于计算指数和对数(Verilog written in LnE algorithm, can be used to calculate the index and the logarithm)