firstinfirstout block

Simulating the functions of POC.(Simulating the functions of POC. In VHDL, with ISE.)

用来代表不同的颜色，在 FPGA 使用斯巴达 3E 板，然后更改使用开关来得到不同的颜色

使用DE2实现DDS，步骤简单，配置管脚可自查看(Using DE2 to realize DDS, the steps are simple and the pins can be self-checked.)

this is verilog code for designing ALU in fpga.

硬件描述语言相关芯片程序源码Chip hardware description language-related program source code(Chip hardware description language-related program source Chip hardware description language-related program source code)

自写的巴克频带滤波器组代码，生成频带滤波器组。内涵debug：输出生成的滤波器(Barker band filter bank code that generates band filter bank. Connotation debug: output generated filter)

Micron 256Mb SDRAM Verilog model，经无数次验证仿真通过，绝对OK版，能严格的查出你代码中的时序，功能等各种问题。仿真通过后的代码上板子接实际的sdrm也是一次性通过哦！

实现LDVS接口数据接收 含有协议结构以及处理(lvds Verilog 512 frame)

用Verilog实现一个基于Mesh拓扑结构的路由器网络(Using Verilog to implement a router network based on Mesh topology)

一個紅外線感測電路的設計，是經由opa來設計。(An infrared sensing circuit design, is designed by opa.)