Stem win iji9325

TV_control代码+说明[1] 利用凌阳单片机语音识别功能去控制电视机-TV_control code+ Note [1] the use of single-chip speech recognition Sunplus to control TV

ARM和CPLD的JTAG的原理图，以及PCB图，为公司做的，顺便发出来，有需要的可以下栽-ARM and CPLD schematic diagram of the JTAG and the PCB map, to do for the company, and the way it comes, there is a need can下栽

基于单片机处理的方式的数字示波器是以单片机为控制中心，通过对采样电路的控制进行波形实时采样、数据处理和存储显示-Microcontroller-based ways to handle the digital oscilloscope is a single-chip microcomputer control center, through the control of the sampling circuit waveforms real-time sampling, data processing and storage display

82c79的显示转换代码--82c79 display conversion code.

几乎对所有开发板的按键都能用，给大家分享，大家多交流！-Almost all of the key development board can be used to share with you, we more exchanges!

一个arm7开发板上cathe内存测试程序，该程序用c语言编写。-a arm7 Development Board cathe memory test program, the program is available c language.

Linux 2.4 内核下动态电源管理（Dynamic Power Management）的源代码，基于Jz4730 CPU的一个实现，支持动态变频，睡眠和唤醒，具有很大参考价值。-Linux kernel 2.4 Dynamic Power Management (Dynamic Power Manage ment) of the source code, based on the CPU Jz4730 a realization that support Dynamic Frequency, sleep and awakened, have great reference value.

VGA显示的FPGA实现-VGA display FPGA

本设计的基本要求是以复杂可编程逻辑器件CPLD为基础，通过在EDA系统软件ispDesignExpert System 环境下进行数字系统设计，熟练掌握该环境下的功能仿真，时间仿真，管脚锁定和芯片下载。 本系统基本上比较全面的模拟了计数式数字频率计，广泛应用于工业、民用等各个领域，具有一定的开发价值。- This design basic request is take complex programmable logical component CPLD as a foundation, through environment carries on the number system design in EDA system software ispDesignExpert under the System, skilled grasps under this environment the function simulation, the time simulation, base pin locking and chip downloading. This system basically quite comprehensive simulation has counted the numerical expression numeral frequency meter, widely applies to the industry, civilly and so on each domain, has the certain development value.

本代码主要实现了两片mega16单片的串口通信，-This code implements two main mega16 chip serial communication,