SPI 主核心

多周期MIPS system vivado实现(Multi-cycle MIPS system vivado)

该程序用来实现电话计时以算取费用，比较简单(telephone cost metering verilog code)

用Verilog硬件语言驱动TLC5615 DAC芯片,可输出方波,并且频率可调

FPGA上用verilog写的SPWM控制程序，完美运行！自由调试，毕设内容，十分宝贵(The SPWM control program by verilog FPGA perfect run! Free commissioning, Bi-based content, invaluable)

NiosII的C代码,包括网卡,lcd,usb,串口,按键.(NiosII C code, including network cards, lcd, usb, serial, key.)

tdma参数化模块。可以自动生成2的n次的tdma哥时隙，用户可根据需要自己配置参数(tdma see the number of model lumps. 2 n basis following manner tdma chance possible 以自 dynamic generation, for root needed self-placement see number)

应用背景基于ZC706和AD9361实现MIMO无线信号的检测，接收端采用最大似然检测算法实现信号的检测。检测出发射端发送额BPSK信号。当然也可以是QPSK，16QAM,64QAM等信号。关键技术接收端需要进行信号的粗同步检测、精同步检测，粗频偏估计、精频偏估计和频偏补偿，信道估计，残留相位跟踪和最大似然检测算法来检测出发射信号。

说明：  该模块实现了FPGA的uart串口收发功能(The module realizes UART serial port transceiver function of FPGA)

adc器件ads62p49配置代码，已在工程中验证可用(Temperature sensor DS18B20 parses the code, has verified the ADC device configuration code, has been verified available)

pcf8563，在quartusII下VERILOG编写的数字时钟程序，8位数码管显示(pcf8563, written in quartusII VERILOG digital clock program, eight digital display)