verilog三阶数字锁相环

使用verilog语言编写的异步串口模块，带有16级深的FIFO，它与DSP28335的SCI相似，可以帮助初学者更快地理解FPGA和DSP的硬件结构和编程思路(Use verilog language of asynchronous serial port module, FIFO with deep level 16, it was similar with DSP28335 SCI, can help beginners to understand faster the FPGA and DSP hardware structure and programming ideas)

资源描述arinc429与232接口协议之间的数据传输代码

说明：  EDA软件VCS学习中用到的实际例子，都已经通过调试验证(Practical examples used in the learning of EDA software VCS have been verified by experiments.)

CMV2000采集的数据，进行图像的位对齐，图像的预处理

本程序用以驱动安捷伦频谱仪和脉冲信号发生器，以产生格雷码波形。(It is aim to driver the PSG and ESA to generate Golay.)

these are verilg prgms

实现SIGMA-DELTA Modulator的veriolog代码(sigma-delta moudulator for RFPLL )

非常基础且实用的六进制加法器，采用VERILOG语言编写而成。(very common and uesfully tool--counter6, iy is writed by Verilog.)

利用单片机控制LED时钟显示，以及闹钟，程序较大，但比较简单易懂。(LED clock display)

FPGA生成伪随机数,希望对加密的童鞋有用(FPGA generates pseudo-random numbers, we want to be useful)